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| author | Evan Cheng <evan.cheng@apple.com> | 2009-09-09 23:55:03 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-09-09 23:55:03 +0000 |
| commit | 71429f87316fc88ebe54b904c4b1326a71fbc3ec (patch) | |
| tree | 61f2465d35a777082027f0ff30a49ca6229b90f7 /lib/Target | |
| parent | 431b4df9155bfbe94d3b50a1f1bdebfa9055cb44 (diff) | |
| download | external_llvm-71429f87316fc88ebe54b904c4b1326a71fbc3ec.zip external_llvm-71429f87316fc88ebe54b904c4b1326a71fbc3ec.tar.gz external_llvm-71429f87316fc88ebe54b904c4b1326a71fbc3ec.tar.bz2 | |
Fix double load / store multiple encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81403 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 5 |
2 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 37e2cfc..d6092fa 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -949,7 +949,7 @@ static unsigned getAddrModeUPBits(unsigned Mode) { // DB - Decrement before - bit U = 0 and bit P = 1 switch (Mode) { default: llvm_unreachable("Unknown addressing sub-mode!"); - case ARM_AM::da: break; + case ARM_AM::da: break; case ARM_AM::db: Binary |= 0x1 << ARMII::P_BitShift; break; case ARM_AM::ia: Binary |= 0x1 << ARMII::U_BitShift; break; case ARM_AM::ib: Binary |= 0x3 << ARMII::U_BitShift; break; diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 62e64db..5388197 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -1070,7 +1070,7 @@ class ASI5<bits<4> opcod1, bits<2> opcod2, dag oops, dag iops, } // Load / store multiple -class AXSI5<dag oops, dag iops, InstrItinClass itin, +class AXDI5<dag oops, dag iops, InstrItinClass itin, string asm, list<dag> pattern> : VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone, VFPLdStMulFrm, itin, asm, "", pattern> { @@ -1079,7 +1079,7 @@ class AXSI5<dag oops, dag iops, InstrItinClass itin, let Inst{11-8} = 0b1011; } -class AXDI5<dag oops, dag iops, InstrItinClass itin, +class AXSI5<dag oops, dag iops, InstrItinClass itin, string asm, list<dag> pattern> : VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone, VFPLdStMulFrm, itin, asm, "", pattern> { @@ -1088,7 +1088,6 @@ class AXDI5<dag oops, dag iops, InstrItinClass itin, let Inst{11-8} = 0b1010; } - // Double precision, unary class ADuI<bits<8> opcod1, bits<4> opcod2, bits<4> opcod3, dag oops, dag iops, InstrItinClass itin, string opc, string asm, list<dag> pattern> |