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| author | Chris Lattner <sabre@nondot.org> | 2006-11-16 00:41:37 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-11-16 00:41:37 +0000 |
| commit | 74531e49ef97cc2bef8fc9c35963368fc63153cf (patch) | |
| tree | 3062e6946932df41054e1228e6329e2e6a9247af /lib/Target | |
| parent | ef20fefa65f5ac422e65e644c6380ea480b7f507 (diff) | |
| download | external_llvm-74531e49ef97cc2bef8fc9c35963368fc63153cf.zip external_llvm-74531e49ef97cc2bef8fc9c35963368fc63153cf.tar.gz external_llvm-74531e49ef97cc2bef8fc9c35963368fc63153cf.tar.bz2 | |
add patterns for ppc32 preinc stores. ppc64 next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31775 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 21 |
2 files changed, 22 insertions, 7 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 3ee5d12..7d2db4b 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -108,6 +108,14 @@ namespace { SDOperand &Base) { return PPCLowering.SelectAddressRegImm(N, Disp, Base, *CurDAG); } + + /// SelectAddrImmOffs - Return true if the operand is valid for a preinc + /// immediate field. Because preinc imms have already been validated, just + /// accept it. + bool SelectAddrImmOffs(SDOperand Op, SDOperand N, SDOperand &Out) const { + Out = N; + return true; + } /// SelectAddrIdx - Given the specified addressed, check to see if it can be /// represented as an indexed [r+r] operation. Returns false if it can diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index aab0eb1..c6fd216 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -273,6 +273,8 @@ def xaddr : ComplexPattern<iPTR, 2, "SelectAddrIdx", [], []>; def xoaddr : ComplexPattern<iPTR, 2, "SelectAddrIdxOnly",[], []>; def ixaddr : ComplexPattern<iPTR, 2, "SelectAddrImmShift", [], []>; // "std" +/// This is just the offset part of iaddr, used for preinc. +def iaddroff : ComplexPattern<iPTR, 1, "SelectAddrImmOffs", [], []>; //===----------------------------------------------------------------------===// // PowerPC Instruction Predicate Definitions. @@ -531,29 +533,34 @@ let isStore = 1, PPC970_Unit = 2 in { def STBU : DForm_1<39, (ops ptr_rc:$ea_res, GPRC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stbu $rS, $ptroff($ptrreg)", LdStGeneral, - [/*(set ptr_rc:$ea_res, - (pre_truncsti8 GPRC:$rS, iaddr:$addr))*/]>, + [(set ptr_rc:$ea_res, + (pre_truncsti8 GPRC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; def STHU : DForm_1<37, (ops ptr_rc:$ea_res, GPRC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "sthu $rS, $ptroff($ptrreg)", LdStGeneral, - [/*(set ptr_rc:$ea_res, - (pre_truncsti16 GPRC:$rS, iaddr:$addr))*/]>, + [(set ptr_rc:$ea_res, + (pre_truncsti16 GPRC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; def STWU : DForm_1<37, (ops ptr_rc:$ea_res, GPRC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stwu $rS, $ptroff($ptrreg)", LdStGeneral, - [/*(set ptr_rc:$ea_res, (pre_store GPRC:$rS, iaddr:$addr))*/]>, + [(set ptr_rc:$ea_res, (pre_store GPRC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; def STFSU : DForm_1<37, (ops ptr_rc:$ea_res, F4RC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stfsu $rS, $ptroff($ptrreg)", LdStGeneral, - [/*(set ptr_rc:$ea_res, (pre_store F4RC:$rS, iaddr:$addr))*/]>, + [(set ptr_rc:$ea_res, (pre_store F4RC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; def STFDU : DForm_1<37, (ops ptr_rc:$ea_res, F8RC:$rS, symbolLo:$ptroff, ptr_rc:$ptrreg), "stfdu $rS, $ptroff($ptrreg)", LdStGeneral, - [/*(set ptr_rc:$ea_res, (pre_store F8RC:$rS, iaddr:$addr))*/]>, + [(set ptr_rc:$ea_res, (pre_store F8RC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; } |