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authorOwen Anderson <resistor@mac.com>2009-08-11 21:59:30 +0000
committerOwen Anderson <resistor@mac.com>2009-08-11 21:59:30 +0000
commit766b5efd99c01e26f00f22d81b57d1385b3d2ab0 (patch)
treeef271d142f40bf61263d72b6ea95cc7b58b2e908 /lib/Target
parenta1a1f02708261aedd2e74d4a11c129f9bbc39716 (diff)
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Fix warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78725 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 02392a3..7507eb2 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -3889,11 +3889,11 @@ static SDValue getVZextMovL(EVT VT, EVT OpVT,
if (!LD) {
// movssrr and movsdrr do not clear top bits. Try to use movd, movq
// instead.
- EVT EVT = (OpVT == MVT::v2f64) ? MVT::i64 : MVT::i32;
- if ((EVT != MVT::i64 || Subtarget->is64Bit()) &&
+ MVT ExtVT = (OpVT == MVT::v2f64) ? MVT::i64 : MVT::i32;
+ if ((ExtVT.SimpleTy != MVT::i64 || Subtarget->is64Bit()) &&
SrcOp.getOpcode() == ISD::SCALAR_TO_VECTOR &&
SrcOp.getOperand(0).getOpcode() == ISD::BIT_CONVERT &&
- SrcOp.getOperand(0).getOperand(0).getValueType() == EVT) {
+ SrcOp.getOperand(0).getOperand(0).getValueType() == ExtVT) {
// PR2108
OpVT = (OpVT == MVT::v2f64) ? MVT::v2i64 : MVT::v4i32;
return DAG.getNode(ISD::BIT_CONVERT, dl, VT,