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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-07-31 00:57:41 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-07-31 00:57:41 +0000 |
| commit | 782638aa0d18f7db7970eb0d8dded84fe7f0c450 (patch) | |
| tree | 1c8c894509b5902a0b0330752fa497d45f9dc8ad /lib/Target | |
| parent | 52b7321a48ae6f1a4f8f56047196d49fdb19ac16 (diff) | |
| download | external_llvm-782638aa0d18f7db7970eb0d8dded84fe7f0c450.zip external_llvm-782638aa0d18f7db7970eb0d8dded84fe7f0c450.tar.gz external_llvm-782638aa0d18f7db7970eb0d8dded84fe7f0c450.tar.bz2 | |
[mips] Rename instruction DANDi to ANDi64.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187469 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index 346cf1e..16a059f 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -81,13 +81,13 @@ def DADDi : ArithLogicI<"daddi", simm16_64, CPU64RegsOpnd>, ADDI_FM<0x18>; def DADDiu : ArithLogicI<"daddiu", simm16_64, CPU64RegsOpnd, IIArith, immSExt16, add>, ADDI_FM<0x19>, IsAsCheapAsAMove; -def DANDi : ArithLogicI<"andi", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16, - and>, - ADDI_FM<0xc>; def SLTi64 : SetCC_I<"slti", setlt, simm16_64, immSExt16, CPU64Regs>, SLTI_FM<0xa>; def SLTiu64 : SetCC_I<"sltiu", setult, simm16_64, immSExt16, CPU64Regs>, SLTI_FM<0xb>; +def ANDi64 : ArithLogicI<"andi", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16, + and>, + ADDI_FM<0xc>; def ORi64 : ArithLogicI<"ori", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16, or>, ADDI_FM<0xd>; @@ -338,7 +338,7 @@ def : InstAlias<"move $dst, $src", (DADDu CPU64RegsOpnd:$dst, CPU64RegsOpnd:$src, ZERO_64), 1>, Requires<[HasMips64]>; def : InstAlias<"and $rs, $rt, $imm", - (DANDi CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, uimm16_64:$imm), + (ANDi64 CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, uimm16_64:$imm), 1>, Requires<[HasMips64]>; def : InstAlias<"slt $rs, $rt, $imm", |