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| author | Chris Lattner <sabre@nondot.org> | 2003-04-26 19:44:35 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2003-04-26 19:44:35 +0000 |
| commit | 7a5adc3ac0fd7acc32f7797aac33d51224c9a443 (patch) | |
| tree | 12b24fe0d73321adef914c04b02560786e53847f /lib/Target | |
| parent | 38f8c4520f03b40dc52ccaeb467dd0246bd3ac03 (diff) | |
| download | external_llvm-7a5adc3ac0fd7acc32f7797aac33d51224c9a443.zip external_llvm-7a5adc3ac0fd7acc32f7797aac33d51224c9a443.tar.gz external_llvm-7a5adc3ac0fd7acc32f7797aac33d51224c9a443.tar.bz2 | |
IntegerRegSize is always 8 for sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5961 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/SparcV9/SparcV9InstrInfo.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/SparcV9/SparcV9InstrSelection.cpp | 5 |
2 files changed, 3 insertions, 6 deletions
diff --git a/lib/Target/SparcV9/SparcV9InstrInfo.cpp b/lib/Target/SparcV9/SparcV9InstrInfo.cpp index 8bdb0f2..331fd46 100644 --- a/lib/Target/SparcV9/SparcV9InstrInfo.cpp +++ b/lib/Target/SparcV9/SparcV9InstrInfo.cpp @@ -441,9 +441,7 @@ UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target, uint64_t C = GetConstantValueAsUnsignedInt(val, isValidConstant); assert(isValidConstant && "Unrecognized constant"); - if (opSize > destSize || - (val->getType()->isSigned() - && destSize < target.getTargetData().getIntegerRegSize())) + if (opSize > destSize || (val->getType()->isSigned() && destSize < 8)) { // operand is larger than dest, // OR both are equal but smaller than the full register size // AND operand is signed, so it may have extra sign bits: diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp index 50e2fe2..78fb2f2 100644 --- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp +++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp @@ -758,8 +758,7 @@ CreateShiftInstructions(const TargetMachine& target, // Value* shiftDest = destVal; unsigned opSize = target.getTargetData().getTypeSize(argVal1->getType()); - if ((shiftOpCode == SLL || shiftOpCode == SLLX) - && opSize < target.getTargetData().getIntegerRegSize()) + if ((shiftOpCode == SLL || shiftOpCode == SLLX) && opSize < 8) { // put SLL result into a temporary shiftDest = new TmpInstruction(argVal1, optArgVal2, "sllTmp"); mcfi.addTemp(shiftDest); @@ -2305,7 +2304,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot, .addReg(dest, MOTy::Def); mvec.push_back(M); } - else if (destSize < target.getTargetData().getIntegerRegSize()) + else if (destSize < 8) assert(0 && "Unsupported type size: 32 < size < 64 bits"); } } |