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| author | Chris Lattner <sabre@nondot.org> | 2008-03-10 18:55:53 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-03-10 18:55:53 +0000 |
| commit | 7b7371c121797a70c56d615cee1947aa5952cf17 (patch) | |
| tree | bb9326cd308937c46c839b4a61ff0b4e92dbda50 /lib/Target | |
| parent | d09daf6b03a3b9bbdafbd4b13defcdf1fedd6daa (diff) | |
| download | external_llvm-7b7371c121797a70c56d615cee1947aa5952cf17.zip external_llvm-7b7371c121797a70c56d615cee1947aa5952cf17.tar.gz external_llvm-7b7371c121797a70c56d615cee1947aa5952cf17.tar.bz2 | |
fix 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48166 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index 43fa172..d8f9d8a 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -329,33 +329,33 @@ static bool StoreRegToStackSlot(const TargetInstrInfo &TII, if (RC == PPC::GPRCRegisterClass) { if (SrcReg != PPC::LR) { NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) - .addReg(SrcReg, false, false, isKill), FrameIdx)); + .addReg(SrcReg, false, false, isKill), FrameIdx)); } else { // FIXME: this spills LR immediately to memory in one step. To do this, // we use R11, which we know cannot be used in the prolog/epilog. This is // a hack. NewMIs.push_back(BuildMI(TII.get(PPC::MFLR), PPC::R11)); NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) - .addReg(PPC::R11, false, false, isKill), FrameIdx)); + .addReg(PPC::R11, false, false, isKill), FrameIdx)); } } else if (RC == PPC::G8RCRegisterClass) { if (SrcReg != PPC::LR8) { NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STD)) - .addReg(SrcReg, false, false, isKill), FrameIdx)); + .addReg(SrcReg, false, false, isKill), FrameIdx)); } else { // FIXME: this spills LR immediately to memory in one step. To do this, // we use R11, which we know cannot be used in the prolog/epilog. This is // a hack. NewMIs.push_back(BuildMI(TII.get(PPC::MFLR8), PPC::X11)); NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STD)) - .addReg(PPC::X11, false, false, isKill), FrameIdx)); + .addReg(PPC::X11, false, false, isKill), FrameIdx)); } } else if (RC == PPC::F8RCRegisterClass) { NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STFD)) - .addReg(SrcReg, false, false, isKill), FrameIdx)); + .addReg(SrcReg, false, false, isKill), FrameIdx)); } else if (RC == PPC::F4RCRegisterClass) { NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STFS)) - .addReg(SrcReg, false, false, isKill), FrameIdx)); + .addReg(SrcReg, false, false, isKill), FrameIdx)); } else if (RC == PPC::CRRCRegisterClass) { if (EnablePPCRS) { // FIXME (64-bit): Enable NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::SPILL_CR)) @@ -374,7 +374,7 @@ static bool StoreRegToStackSlot(const TargetInstrInfo &TII, unsigned ShiftBits = PPCRegisterInfo::getRegisterNumbering(SrcReg)*4; // rlwinm r0, r0, ShiftBits, 0, 31. NewMIs.push_back(BuildMI(TII.get(PPC::RLWINM), PPC::R0) - .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); + .addReg(PPC::R0).addImm(ShiftBits).addImm(0).addImm(31)); } NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::STW)) @@ -416,7 +416,7 @@ static bool StoreRegToStackSlot(const TargetInstrInfo &TII, NewMIs.push_back(addFrameReference(BuildMI(TII.get(PPC::ADDI), PPC::R0), FrameIdx, 0, 0)); NewMIs.push_back(BuildMI(TII.get(PPC::STVX)) - .addReg(SrcReg, false, false, isKill).addReg(PPC::R0).addReg(PPC::R0)); + .addReg(SrcReg, false, false, isKill).addReg(PPC::R0).addReg(PPC::R0)); } else { assert(0 && "Unknown regclass!"); abort(); |