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author | Evan Cheng <evan.cheng@apple.com> | 2009-08-10 07:58:45 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-08-10 07:58:45 +0000 |
commit | 8442d00a0ea750200b34a7fa94b5b72033da65b3 (patch) | |
tree | c404b9c851efef180f6ca1f01e35c6867fc4a9cc /lib/Target | |
parent | 0d3007bb32c9085e6d45264133248a98379e2d8a (diff) | |
download | external_llvm-8442d00a0ea750200b34a7fa94b5b72033da65b3.zip external_llvm-8442d00a0ea750200b34a7fa94b5b72033da65b3.tar.gz external_llvm-8442d00a0ea750200b34a7fa94b5b72033da65b3.tar.bz2 |
rev, rev16, and revsh do not set CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78561 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/Thumb2SizeReduction.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/ARM/Thumb2SizeReduction.cpp b/lib/Target/ARM/Thumb2SizeReduction.cpp index 4f648ec..9a56f2f 100644 --- a/lib/Target/ARM/Thumb2SizeReduction.cpp +++ b/lib/Target/ARM/Thumb2SizeReduction.cpp @@ -71,9 +71,9 @@ namespace { { ARM::t2MUL, 0, ARM::tMUL, 0, 0, 0, 1, 0,0, 0 }, { ARM::t2MVNr, ARM::tMVN, 0, 0, 0, 1, 0, 0,0, 0 }, { ARM::t2ORRrr, 0, ARM::tORR, 0, 0, 0, 1, 0,0, 0 }, - { ARM::t2REV, ARM::tREV, 0, 0, 0, 1, 0, 0,0, 0 }, - { ARM::t2REV16, ARM::tREV16, 0, 0, 0, 1, 0, 0,0, 0 }, - { ARM::t2REVSH, ARM::tREVSH, 0, 0, 0, 1, 0, 0,0, 0 }, + { ARM::t2REV, ARM::tREV, 0, 0, 0, 1, 0, 1,0, 0 }, + { ARM::t2REV16, ARM::tREV16, 0, 0, 0, 1, 0, 1,0, 0 }, + { ARM::t2REVSH, ARM::tREVSH, 0, 0, 0, 1, 0, 1,0, 0 }, { ARM::t2RORrr, 0, ARM::tROR, 0, 0, 0, 1, 0,0, 0 }, // FIXME: T2RSBri immediate must be zero. Also need entry for T2RSBS //{ ARM::t2RSBri, ARM::tRSB, 0, 0, 0, 1, 0, 0,0, 0 }, |