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| author | Bob Wilson <bob.wilson@apple.com> | 2010-08-26 05:33:30 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-08-26 05:33:30 +0000 |
| commit | 8d1f30a7b84941f0777010f15ce810d2091934fe (patch) | |
| tree | 5026bd9d50a629fa89f5d307f0c9dde06fa4c941 /lib/Target | |
| parent | 7376320f3bb36d4e1173f338c3cc15284fdf042b (diff) | |
| download | external_llvm-8d1f30a7b84941f0777010f15ce810d2091934fe.zip external_llvm-8d1f30a7b84941f0777010f15ce810d2091934fe.tar.gz external_llvm-8d1f30a7b84941f0777010f15ce810d2091934fe.tar.bz2 | |
Use pseudo instructions for VST1d64Q.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112170 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/ARM/ARMExpandPseudoInsts.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 5 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 3 | ||||
| -rw-r--r-- | lib/Target/ARM/NEONPreAllocPass.cpp | 1 |
4 files changed, 9 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/lib/Target/ARM/ARMExpandPseudoInsts.cpp index c71b093..56c6468 100644 --- a/lib/Target/ARM/ARMExpandPseudoInsts.cpp +++ b/lib/Target/ARM/ARMExpandPseudoInsts.cpp @@ -229,12 +229,16 @@ bool ARMExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) { ExpandVST4(MBBI, ARM::VST4d16, false, SingleSpc); break; case ARM::VST4d32Pseudo: ExpandVST4(MBBI, ARM::VST4d32, false, SingleSpc); break; + case ARM::VST1d64QPseudo: + ExpandVST4(MBBI, ARM::VST1d64Q, false, SingleSpc); break; case ARM::VST4d8Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4d8_UPD, true, SingleSpc); break; case ARM::VST4d16Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4d16_UPD, true, SingleSpc); break; case ARM::VST4d32Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4d32_UPD, true, SingleSpc); break; + case ARM::VST1d64QPseudo_UPD: + ExpandVST4(MBBI, ARM::VST1d64Q_UPD, true, SingleSpc); break; case ARM::VST4q8Pseudo_UPD: ExpandVST4(MBBI, ARM::VST4q8_UPD, true, EvenDblSpc); break; case ARM::VST4q16Pseudo_UPD: diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 86f64bc..3619084 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -1262,8 +1262,7 @@ SDNode *ARMDAGToDAGISel::SelectVST(SDNode *N, unsigned NumVecs, // FIXME: This is a temporary flag to distinguish VSTs that have been // converted to pseudo instructions. - bool usePseudoInstrs = (NumVecs == 4 && - VT.getSimpleVT().SimpleTy != MVT::v1i64); + bool usePseudoInstrs = (NumVecs == 4); if (is64BitVector) { if (NumVecs >= 2) { @@ -2331,7 +2330,7 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) { case Intrinsic::arm_neon_vst4: { unsigned DOpcodes[] = { ARM::VST4d8Pseudo, ARM::VST4d16Pseudo, - ARM::VST4d32Pseudo, ARM::VST1d64Q }; + ARM::VST4d32Pseudo, ARM::VST1d64QPseudo }; unsigned QOpcodes0[] = { ARM::VST4q8Pseudo_UPD, ARM::VST4q16Pseudo_UPD, ARM::VST4q32Pseudo_UPD }; diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 4c14b23..cf697b2 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -583,6 +583,9 @@ def VST1d16Q_UPD : VST1D4WB<0b0100, "16">; def VST1d32Q_UPD : VST1D4WB<0b1000, "32">; def VST1d64Q_UPD : VST1D4WB<0b1100, "64">; +def VST1d64QPseudo : VSTQQPseudo; +def VST1d64QPseudo_UPD : VSTQQWBPseudo; + // VST2 : Vector Store (multiple 2-element structures) class VST2D<bits<4> op11_8, bits<4> op7_4, string Dt> : NLdSt<0, 0b00, op11_8, op7_4, (outs), diff --git a/lib/Target/ARM/NEONPreAllocPass.cpp b/lib/Target/ARM/NEONPreAllocPass.cpp index 0c1cfae..1439995 100644 --- a/lib/Target/ARM/NEONPreAllocPass.cpp +++ b/lib/Target/ARM/NEONPreAllocPass.cpp @@ -260,7 +260,6 @@ static bool isNEONMultiRegOp(int Opcode, unsigned &FirstOpnd, unsigned &NumRegs, Stride = 2; return true; - case ARM::VST1d64Q: case ARM::VST4LNd8: case ARM::VST4LNd16: case ARM::VST4LNd32: |