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| author | Vincent Lejeune <vljn@ovi.com> | 2013-07-31 19:32:07 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-07-31 19:32:07 +0000 |
| commit | 8e37705a736f45c16ed82ca675f7e413aa3bf90e (patch) | |
| tree | 218951ee7c1cecdef61d95b438abe80275b8fc6e /lib/Target | |
| parent | 98ce62780ea7185ba710868bf83c8077e8d7f6d6 (diff) | |
| download | external_llvm-8e37705a736f45c16ed82ca675f7e413aa3bf90e.zip external_llvm-8e37705a736f45c16ed82ca675f7e413aa3bf90e.tar.gz external_llvm-8e37705a736f45c16ed82ca675f7e413aa3bf90e.tar.bz2 | |
R600: Avoid more than 4 literals in the same instruction group at scheduling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187515 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/R600/R600InstrInfo.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp index 7ef3d85..812675a 100644 --- a/lib/Target/R600/R600InstrInfo.cpp +++ b/lib/Target/R600/R600InstrInfo.cpp @@ -563,6 +563,7 @@ bool R600InstrInfo::fitsConstReadLimitations(const std::vector<MachineInstr *> &MIs) const { std::vector<unsigned> Consts; + SmallSet<int64_t, 4> Literals; for (unsigned i = 0, n = MIs.size(); i < n; i++) { MachineInstr *MI = MIs[i]; if (!isALUInstr(MI->getOpcode())) @@ -573,6 +574,10 @@ R600InstrInfo::fitsConstReadLimitations(const std::vector<MachineInstr *> &MIs) for (unsigned j = 0, e = Srcs.size(); j < e; j++) { std::pair<MachineOperand *, unsigned> Src = Srcs[j]; + if (Src.first->getReg() == AMDGPU::ALU_LITERAL_X) + Literals.insert(Src.second); + if (Literals.size() > 4) + return false; if (Src.first->getReg() == AMDGPU::ALU_CONST) Consts.push_back(Src.second); if (AMDGPU::R600_KC0RegClass.contains(Src.first->getReg()) || |