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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-05-17 10:15:22 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-05-17 10:15:22 +0000 |
| commit | 95a736e8944ac2731b1d64871312f826a06a2c6b (patch) | |
| tree | a83f5ebb8a6e4006b73ac8f12f2c697b7454c669 /lib/Target | |
| parent | de02483948b6c3bd14d083ec165b72cd7e0f438d (diff) | |
| download | external_llvm-95a736e8944ac2731b1d64871312f826a06a2c6b.zip external_llvm-95a736e8944ac2731b1d64871312f826a06a2c6b.tar.gz external_llvm-95a736e8944ac2731b1d64871312f826a06a2c6b.tar.bz2 | |
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71975 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/MSP430/MSP430ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/MSP430/MSP430InstrInfo.td | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 1816586..387cebf 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -468,7 +468,7 @@ SDValue MSP430TargetLowering::LowerShifts(SDValue Op, } while (ShiftAmount--) - Victim = DAG.getNode((Opc == ISD::SRA ? MSP430ISD::RRA : MSP430ISD::RLA), + Victim = DAG.getNode((Opc == ISD::SHL ? MSP430ISD::RLA : MSP430ISD::RRA), dl, VT, Victim); return Victim; diff --git a/lib/Target/MSP430/MSP430InstrInfo.td b/lib/Target/MSP430/MSP430InstrInfo.td index de1b2ad..39c08e4 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.td +++ b/lib/Target/MSP430/MSP430InstrInfo.td @@ -624,12 +624,12 @@ def SHL16r1 : Pseudo<(outs GR16:$dst), (ins GR16:$src), (implicit SRW)]>; def SAR8r1c : Pseudo<(outs GR8:$dst), (ins GR8:$src), - "clrc\n" + "clrc\n\t" "rrc.b\t$dst", [(set GR8:$dst, (MSP430rrc GR8:$src)), (implicit SRW)]>; def SAR16r1c : Pseudo<(outs GR16:$dst), (ins GR16:$src), - "clrc\n" + "clrc\n\t" "rrc.w\t$dst", [(set GR16:$dst, (MSP430rrc GR16:$src)), (implicit SRW)]>; |