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author | Dan Gohman <gohman@apple.com> | 2009-07-30 00:10:18 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-07-30 00:10:18 +0000 |
commit | a360489b3a9ccbf8f8ff6f3e8ee583cb8f7899db (patch) | |
tree | 5e3459490f651112b25a224abc0bb8270d9fa655 /lib/Target | |
parent | 723bf6f1f50abfb637b1b30200a187638651f9ed (diff) | |
download | external_llvm-a360489b3a9ccbf8f8ff6f3e8ee583cb8f7899db.zip external_llvm-a360489b3a9ccbf8f8ff6f3e8ee583cb8f7899db.tar.gz external_llvm-a360489b3a9ccbf8f8ff6f3e8ee583cb8f7899db.tar.bz2 |
Use array_endof instead of doing it manually.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77553 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.td | 47 |
1 files changed, 20 insertions, 27 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td index 2e6f017..c63f17a 100644 --- a/lib/Target/X86/X86RegisterInfo.td +++ b/lib/Target/X86/X86RegisterInfo.td @@ -314,11 +314,11 @@ def GR8 : RegisterClass<"X86", [i8], 8, const TargetRegisterInfo *RI = TM.getRegisterInfo(); const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); if (!Subtarget.is64Bit()) - return X86_GR8_AO_32 + (sizeof(X86_GR8_AO_32) / sizeof(unsigned)); + return array_endof(X86_GR8_AO_32); else if (RI->hasFP(MF)) - return X86_GR8_AO_64_fp + (sizeof(X86_GR8_AO_64_fp) / sizeof(unsigned)); + return array_endof(X86_GR8_AO_64_fp); else - return X86_GR8_AO_64 + (sizeof(X86_GR8_AO_64) / sizeof(unsigned)); + return array_endof(X86_GR8_AO_64); } }]; } @@ -378,14 +378,14 @@ def GR16 : RegisterClass<"X86", [i16], 16, const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); if (Subtarget.is64Bit()) { if (RI->hasFP(MF)) - return X86_GR16_AO_64_fp+(sizeof(X86_GR16_AO_64_fp)/sizeof(unsigned)); + return array_endof(X86_GR16_AO_64_fp); else - return X86_GR16_AO_64 + (sizeof(X86_GR16_AO_64) / sizeof(unsigned)); + return array_endof(X86_GR16_AO_64); } else { if (RI->hasFP(MF)) - return X86_GR16_AO_32_fp+(sizeof(X86_GR16_AO_32_fp)/sizeof(unsigned)); + return array_endof(X86_GR16_AO_32_fp); else - return X86_GR16_AO_32 + (sizeof(X86_GR16_AO_32) / sizeof(unsigned)); + return array_endof(X86_GR16_AO_32); } } }]; @@ -446,14 +446,14 @@ def GR32 : RegisterClass<"X86", [i32], 32, const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); if (Subtarget.is64Bit()) { if (RI->hasFP(MF)) - return X86_GR32_AO_64_fp+(sizeof(X86_GR32_AO_64_fp)/sizeof(unsigned)); + return array_endof(X86_GR32_AO_64_fp); else - return X86_GR32_AO_64 + (sizeof(X86_GR32_AO_64) / sizeof(unsigned)); + return array_endof(X86_GR32_AO_64); } else { if (RI->hasFP(MF)) - return X86_GR32_AO_32_fp+(sizeof(X86_GR32_AO_32_fp)/sizeof(unsigned)); + return array_endof(X86_GR32_AO_32_fp); else - return X86_GR32_AO_32 + (sizeof(X86_GR32_AO_32) / sizeof(unsigned)); + return array_endof(X86_GR32_AO_32); } } }]; @@ -549,14 +549,11 @@ def GR8_NOREX : RegisterClass<"X86", [i8], 8, const TargetRegisterInfo *RI = TM.getRegisterInfo(); const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); if (!Subtarget.is64Bit()) - return X86_GR8_NOREX_AO_32 + - (sizeof(X86_GR8_NOREX_AO_32) / sizeof(unsigned)); + return array_endof(X86_GR8_NOREX_AO_32); else if (RI->hasFP(MF)) - return X86_GR8_NOREX_AO_64_fp + - (sizeof(X86_GR8_NOREX_AO_64_fp) / sizeof(unsigned)); + return array_endof(X86_GR8_NOREX_AO_64_fp); else - return X86_GR8_NOREX_AO_64 + - (sizeof(X86_GR8_NOREX_AO_64) / sizeof(unsigned)); + return array_endof(X86_GR8_NOREX_AO_64); } }]; } @@ -593,9 +590,9 @@ def GR16_NOREX : RegisterClass<"X86", [i16], 16, const TargetMachine &TM = MF.getTarget(); const TargetRegisterInfo *RI = TM.getRegisterInfo(); if (RI->hasFP(MF)) - return X86_GR16_AO_fp+(sizeof(X86_GR16_AO_fp)/sizeof(unsigned)); + return array_endof(X86_GR16_AO_fp); else - return X86_GR16_AO + (sizeof(X86_GR16_AO) / sizeof(unsigned)); + return array_endof(X86_GR16_AO); } }]; } @@ -633,11 +630,9 @@ def GR32_NOREX : RegisterClass<"X86", [i32], 32, const TargetMachine &TM = MF.getTarget(); const TargetRegisterInfo *RI = TM.getRegisterInfo(); if (RI->hasFP(MF)) - return X86_GR32_NOREX_AO_fp + - (sizeof(X86_GR32_NOREX_AO_fp) / sizeof(unsigned)); + return array_endof(X86_GR32_NOREX_AO_fp); else - return X86_GR32_NOREX_AO + - (sizeof(X86_GR32_NOREX_AO) / sizeof(unsigned)); + return array_endof(X86_GR32_NOREX_AO); } }]; } @@ -676,11 +671,9 @@ def GR64_NOREX : RegisterClass<"X86", [i64], 64, const TargetMachine &TM = MF.getTarget(); const TargetRegisterInfo *RI = TM.getRegisterInfo(); if (RI->hasFP(MF)) - return X86_GR64_NOREX_AO_fp + - (sizeof(X86_GR64_NOREX_AO_fp) / sizeof(unsigned)); + return array_endof(X86_GR64_NOREX_AO_fp); else - return X86_GR64_NOREX_AO + - (sizeof(X86_GR64_NOREX_AO) / sizeof(unsigned)); + return array_endof(X86_GR64_NOREX_AO); } }]; } |