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author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2003-07-29 19:54:41 +0000 |
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committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2003-07-29 19:54:41 +0000 |
commit | ada280faa9e4e912543d1dc1a536ecf4cc396260 (patch) | |
tree | 0d2b4e92e83bb1aba8fa169199b2a35607dab68d /lib/Target | |
parent | 83d30c89e55642462a2341547f516711f80c4c9a (diff) | |
download | external_llvm-ada280faa9e4e912543d1dc1a536ecf4cc396260.zip external_llvm-ada280faa9e4e912543d1dc1a536ecf4cc396260.tar.gz external_llvm-ada280faa9e4e912543d1dc1a536ecf4cc396260.tar.bz2 |
Add ConvertConstantToIntType() to unify all constant handling
that depends on machine register size.
Moved insertCallerSavingCode() to PhyRegAlloc and
moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all
machine independent. Remove several dead functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7392 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/SparcV9/SparcV9Internals.h | 66 |
1 files changed, 16 insertions, 50 deletions
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h index 5539aa4..e43b0f3 100644 --- a/lib/Target/SparcV9/SparcV9Internals.h +++ b/lib/Target/SparcV9/SparcV9Internals.h @@ -21,7 +21,6 @@ class LiveRange; class UltraSparc; -class PhyRegAlloc; class Pass; enum SparcInstrSchedClass { @@ -158,6 +157,19 @@ struct UltraSparcInstrInfo : public TargetInstrInfo { // virtual MachineOpCode getNOPOpCode() const { return V9::NOP; } + // Get the value of an integral constant in the form that must + // be put into the machine register. The specified constant is interpreted + // as (i.e., converted if necessary to) the specified destination type. The + // result is always returned as an uint64_t, since the representation of + // int64_t and uint64_t are identical. The argument can be any known const. + // + // isValidConstant is set to true if a valid constant was found. + // + virtual uint64_t ConvertConstantToIntType(const TargetMachine &target, + const Value *V, + const Type *destType, + bool &isValidConstant) const; + // Create an instruction sequence to put the constant `val' into // the virtual register `dest'. `val' may be a Constant or a // GlobalValue, viz., the constant address of a global variable or function. @@ -271,35 +283,9 @@ private: void suggestReg4CallAddr(MachineInstr *CallMI, LiveRangeInfo &LRI) const; - void InitializeOutgoingArg(MachineInstr* CallMI, AddedInstrns *CallAI, - PhyRegAlloc &PRA, LiveRange* LR, - unsigned regType, unsigned RegClassID, - int UniArgReg, unsigned int argNo, - std::vector<MachineInstr *>& AddedInstrnsBefore) - const; - // Helper used by the all the getRegType() functions. int getRegTypeForClassAndType(unsigned regClassID, const Type* type) const; - // Used to generate a copy instruction based on the register class of - // value. - // - MachineInstr *cpValue2RegMI(Value *Val, unsigned DestReg, - int RegType) const; - - - // The following 2 methods are used to order the instructions addeed by - // the register allocator in association with function calling. See - // SparcRegInfo.cpp for more details - // - void moveInst2OrdVec(std::vector<MachineInstr *> &OrdVec, - MachineInstr *UnordInst, - PhyRegAlloc &PRA) const; - - void OrderAddedInstrns(std::vector<MachineInstr *> &UnordVec, - std::vector<MachineInstr *> &OrdVec, - PhyRegAlloc &PRA) const; - public: // Type of registers available in Sparc. There can be several reg types // in the same class. For instace, the float reg class has Single/Double @@ -382,16 +368,9 @@ public: void suggestReg4RetValue(MachineInstr *RetMI, LiveRangeInfo& LRI) const; - void colorMethodArgs(const Function *Meth, LiveRangeInfo &LRI, - AddedInstrns *FirstAI) const; - - // This method inserts the caller saving code for call instructions - // - void insertCallerSavingCode(std::vector<MachineInstr*>& instrnsBefore, - std::vector<MachineInstr*>& instrnsAfter, - MachineInstr *CallMI, - const BasicBlock *BB, - PhyRegAlloc &PRA ) const; + void colorMethodArgs(const Function *Meth, LiveRangeInfo& LRI, + std::vector<MachineInstr*>& InstrnsBefore, + std::vector<MachineInstr*>& InstrnsAfter) const; // method used for printing a register for debugging purposes // @@ -440,17 +419,6 @@ public: void cpValue2Value(Value *Src, Value *Dest, std::vector<MachineInstr*>& mvec) const; - // To see whether a register is a volatile (i.e., whehter it must be - // preserved acorss calls) - // - inline bool isRegVolatile(int RegClassID, int Reg) const { - return MachineRegClassArr[RegClassID]->isRegVolatile(Reg); - } - - inline bool modifiedByCall(int RegClassID, int Reg) const { - return MachineRegClassArr[RegClassID]->modifiedByCall(Reg); - } - // Get the register type for a register identified different ways. // Note that getRegTypeForLR(LR) != getRegTypeForDataType(LR->getType())! // The reg class of a LR depends both on the Value types in it and whether @@ -727,8 +695,6 @@ public: Pass* getEmitBytecodeToAsmPass(std::ostream &Out); }; -int64_t GetConstantValueAsSignedInt(const Value *V, bool &isValidConstant); - Pass *getFunctionInfo(std::ostream &out); #endif |