Tidy up several unbeseeming casts from pointer to intptr_t.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55779 91177308-0d34-0410-b5e6-96231b3b80d8

19 files changed, 24 insertions, 24 deletions

diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 16b0041..80f6898 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -39,11 +39,11 @@ namespace {
   public:
     static char ID;
     explicit ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
-      : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm),
+      : MachineFunctionPass(&ID), II(0), TD(0), TM(tm),
       MCE(mce) {}
     ARMCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
             const ARMInstrInfo &ii, const TargetData &td)
-      : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm),
+      : MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm),
       MCE(mce) {}
 
     bool runOnMachineFunction(MachineFunction &MF);
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index f577de5..73c5618 100644
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -129,7 +129,7 @@ namespace {
     bool isThumb;
   public:
     static char ID;
-    ARMConstantIslands() : MachineFunctionPass((intptr_t)&ID) {}
+    ARMConstantIslands() : MachineFunctionPass(&ID) {}
 
     virtual bool runOnMachineFunction(MachineFunction &Fn);
 
diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 5eeeafb..8bd4caa 100644
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -39,7 +39,7 @@ STATISTIC(NumFSTMGened, "Number of fstm instructions generated");
 namespace {
   struct VISIBILITY_HIDDEN ARMLoadStoreOpt : public MachineFunctionPass {
     static char ID;
-    ARMLoadStoreOpt() : MachineFunctionPass((intptr_t)&ID) {}
+    ARMLoadStoreOpt() : MachineFunctionPass(&ID) {}
 
     const TargetInstrInfo *TII;
     const TargetRegisterInfo *TRI;
diff --git a/lib/Target/Alpha/AlphaBranchSelector.cpp b/lib/Target/Alpha/AlphaBranchSelector.cpp
index f1d60c8..aca8ca7 100644
--- a/lib/Target/Alpha/AlphaBranchSelector.cpp
+++ b/lib/Target/Alpha/AlphaBranchSelector.cpp
@@ -23,7 +23,7 @@ using namespace llvm;
 namespace {
   struct VISIBILITY_HIDDEN AlphaBSel : public MachineFunctionPass {
     static char ID;
-    AlphaBSel() : MachineFunctionPass((intptr_t)&ID) {}
+    AlphaBSel() : MachineFunctionPass(&ID) {}
 
     virtual bool runOnMachineFunction(MachineFunction &Fn);
 
diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp
index 40e1413..b514409 100644
--- a/lib/Target/Alpha/AlphaCodeEmitter.cpp
+++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp
@@ -39,10 +39,10 @@ namespace {
   public:
     static char ID;
     explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
-      : MachineFunctionPass((intptr_t)&ID), II(0), TM(tm), MCE(mce) {}
+      : MachineFunctionPass(&ID), II(0), TM(tm), MCE(mce) {}
     AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
                      const AlphaInstrInfo& ii)
-      : MachineFunctionPass((intptr_t)&ID), II(&ii), TM(tm), MCE(mce) {}
+      : MachineFunctionPass(&ID), II(&ii), TM(tm), MCE(mce) {}
 
     bool runOnMachineFunction(MachineFunction &MF);
 
diff --git a/lib/Target/Alpha/AlphaLLRP.cpp b/lib/Target/Alpha/AlphaLLRP.cpp
index f4dd199..7a1b784 100644
--- a/lib/Target/Alpha/AlphaLLRP.cpp
+++ b/lib/Target/Alpha/AlphaLLRP.cpp
@@ -39,7 +39,7 @@ namespace {
 
     static char ID;
     AlphaLLRPPass(AlphaTargetMachine &tm) 
-      : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
+      : MachineFunctionPass(&ID), TM(tm) { }
 
     virtual const char *getPassName() const {
       return "Alpha NOP inserter";
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index 456bda3..a1222da 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -60,7 +60,7 @@ namespace {
   public:
     static char ID;
     CBackendNameAllUsedStructsAndMergeFunctions() 
-      : ModulePass((intptr_t)&ID) {}
+      : ModulePass(&ID) {}
     void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequired<FindUsedTypes>();
     }
@@ -92,7 +92,7 @@ namespace {
   public:
     static char ID;
     explicit CWriter(raw_ostream &o)
-      : FunctionPass((intptr_t)&ID), Out(o), IL(0), Mang(0), LI(0), 
+      : FunctionPass(&ID), Out(o), IL(0), Mang(0), LI(0), 
         TheModule(0), TAsm(0), TD(0) {}
 
     virtual const char *getPassName() const { return "C backend"; }
diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp
index 33326e1..b39d774 100644
--- a/lib/Target/CppBackend/CPPBackend.cpp
+++ b/lib/Target/CppBackend/CPPBackend.cpp
@@ -103,7 +103,7 @@ namespace {
   public:
     static char ID;
     explicit CppWriter(raw_ostream &o) :
-      ModulePass((intptr_t)&ID), Out(o), uniqueNum(0), is_inline(false) {}
+      ModulePass(&ID), Out(o), uniqueNum(0), is_inline(false) {}
 
     virtual const char *getPassName() const { return "C++ backend"; }
 
diff --git a/lib/Target/IA64/IA64Bundling.cpp b/lib/Target/IA64/IA64Bundling.cpp
index cac007c..c5bc83e 100644
--- a/lib/Target/IA64/IA64Bundling.cpp
+++ b/lib/Target/IA64/IA64Bundling.cpp
@@ -43,7 +43,7 @@ namespace {
     IA64TargetMachine &TM;
 
     IA64BundlingPass(IA64TargetMachine &tm) 
-      : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
+      : MachineFunctionPass(&ID), TM(tm) { }
 
     virtual const char *getPassName() const {
       return "IA64 (Itanium) Bundling Pass";
diff --git a/lib/Target/MSIL/MSILWriter.h b/lib/Target/MSIL/MSILWriter.h
index b141e23..c64ceee 100644
--- a/lib/Target/MSIL/MSILWriter.h
+++ b/lib/Target/MSIL/MSILWriter.h
@@ -42,7 +42,7 @@ namespace {
     static char ID;
     MSILModule(const std::set<const Type *>*& _UsedTypes,
                const TargetData*& _TD)
-      : ModulePass((intptr_t)&ID), UsedTypes(_UsedTypes), TD(_TD) {}
+      : ModulePass(&ID), UsedTypes(_UsedTypes), TD(_TD) {}
 
     void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addRequired<FindUsedTypes>();
@@ -86,7 +86,7 @@ namespace {
       StaticInitList;
     const std::set<const Type *>* UsedTypes;
     static char ID;
-    MSILWriter(raw_ostream &o) : FunctionPass((intptr_t)&ID), Out(o) {
+    MSILWriter(raw_ostream &o) : FunctionPass(&ID), Out(o) {
       UniqID = 0;
     }
 
diff --git a/lib/Target/Mips/MipsDelaySlotFiller.cpp b/lib/Target/Mips/MipsDelaySlotFiller.cpp
index 881cd12..4825b29 100644
--- a/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -32,7 +32,7 @@ namespace {
 
     static char ID;
     Filler(TargetMachine &tm) 
-      : MachineFunctionPass((intptr_t)&ID), TM(tm), TII(tm.getInstrInfo()) { }
+      : MachineFunctionPass(&ID), TM(tm), TII(tm.getInstrInfo()) { }
 
     virtual const char *getPassName() const {
       return "Mips Delay Slot Filler";
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index ab988ba..2fc5b3c 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -32,7 +32,7 @@ STATISTIC(NumExpanded, "Number of branches expanded to long format");
 namespace {
   struct VISIBILITY_HIDDEN PPCBSel : public MachineFunctionPass {
     static char ID;
-    PPCBSel() : MachineFunctionPass((intptr_t)&ID) {}
+    PPCBSel() : MachineFunctionPass(&ID) {}
 
     /// BlockSizes - The sizes of the basic blocks in the function.
     std::vector<unsigned> BlockSizes;
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp
index 3326cf7..a77c726 100644
--- a/lib/Target/PowerPC/PPCCodeEmitter.cpp
+++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp
@@ -48,7 +48,7 @@ namespace {
   public:
     static char ID;
     PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
-      : MachineFunctionPass((intptr_t)&ID), TM(T), MCE(M) {}
+      : MachineFunctionPass(&ID), TM(T), MCE(M) {}
 
     const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
 
diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp
index 8185732..f6648a8 100644
--- a/lib/Target/Sparc/DelaySlotFiller.cpp
+++ b/lib/Target/Sparc/DelaySlotFiller.cpp
@@ -32,7 +32,7 @@ namespace {
 
     static char ID;
     Filler(TargetMachine &tm) 
-      : MachineFunctionPass((intptr_t)&ID), TM(tm), TII(tm.getInstrInfo()) { }
+      : MachineFunctionPass(&ID), TM(tm), TII(tm.getInstrInfo()) { }
 
     virtual const char *getPassName() const {
       return "SPARC Delay Slot Filler";
diff --git a/lib/Target/Sparc/FPMover.cpp b/lib/Target/Sparc/FPMover.cpp
index 016215b..a542fc5 100644
--- a/lib/Target/Sparc/FPMover.cpp
+++ b/lib/Target/Sparc/FPMover.cpp
@@ -34,7 +34,7 @@ namespace {
     
     static char ID;
     FPMover(TargetMachine &tm) 
-      : MachineFunctionPass((intptr_t)&ID), TM(tm) { }
+      : MachineFunctionPass(&ID), TM(tm) { }
 
     virtual const char *getPassName() const {
       return "Sparc Double-FP Move Fixer";
diff --git a/lib/Target/TargetData.cpp b/lib/Target/TargetData.cpp
index f83adef..650f91e 100644
--- a/lib/Target/TargetData.cpp
+++ b/lib/Target/TargetData.cpp
@@ -232,7 +232,7 @@ void TargetData::init(const std::string &TargetDescription) {
 }
 
 TargetData::TargetData(const Module *M) 
-  : ImmutablePass((intptr_t)&ID) {
+  : ImmutablePass(&ID) {
   init(M->getDataLayout());
 }
 
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index c3a1ed9..1c81b4b 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -46,12 +46,12 @@ namespace {
   public:
     static char ID;
     explicit Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce)
-      : MachineFunctionPass((intptr_t)&ID), II(0), TD(0), TM(tm), 
+      : MachineFunctionPass(&ID), II(0), TD(0), TM(tm), 
       MCE(mce), PICBaseOffset(0), Is64BitMode(false),
       IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
     Emitter(X86TargetMachine &tm, MachineCodeEmitter &mce,
             const X86InstrInfo &ii, const TargetData &td, bool is64)
-      : MachineFunctionPass((intptr_t)&ID), II(&ii), TD(&td), TM(tm), 
+      : MachineFunctionPass(&ID), II(&ii), TD(&td), TM(tm), 
       MCE(mce), PICBaseOffset(0), Is64BitMode(is64),
       IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
 
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index 7dadd44..5da02c6 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -53,7 +53,7 @@ STATISTIC(NumFP  , "Number of floating point instructions");
 namespace {
   struct VISIBILITY_HIDDEN FPS : public MachineFunctionPass {
     static char ID;
-    FPS() : MachineFunctionPass((intptr_t)&ID) {}
+    FPS() : MachineFunctionPass(&ID) {}
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
 
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 4f335ab..d7bf939 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -1118,7 +1118,7 @@ unsigned getX86SubSuperRegister(unsigned Reg, MVT VT, bool High) {
 namespace {
   struct VISIBILITY_HIDDEN MSAC : public MachineFunctionPass {
     static char ID;
-    MSAC() : MachineFunctionPass((intptr_t)&ID) {}
+    MSAC() : MachineFunctionPass(&ID) {}
 
     virtual bool runOnMachineFunction(MachineFunction &MF) {
       MachineFrameInfo *FFI = MF.getFrameInfo();