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authorEric Christopher <echristo@apple.com>2010-08-04 23:03:04 +0000
committerEric Christopher <echristo@apple.com>2010-08-04 23:03:04 +0000
commitb6729dc0ef7556ced99e79a7d37ec4d7f6dd75b4 (patch)
treea37bbfd5525ac9855229b66dbe2fc126cc7d36e1 /lib/Target
parent3dcc91ee8c48f210d302937ecbbf0d277f8b656e (diff)
downloadexternal_llvm-b6729dc0ef7556ced99e79a7d37ec4d7f6dd75b4.zip
external_llvm-b6729dc0ef7556ced99e79a7d37ec4d7f6dd75b4.tar.gz
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Make x86-64 membarriers work without sse and clean up some of the
uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110274 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp7
-rw-r--r--lib/Target/X86/X86Instr64bit.td7
-rw-r--r--lib/Target/X86/X86InstrInfo.td4
3 files changed, 14 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index af82feb..44c95b5 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -7654,9 +7654,12 @@ SDValue X86TargetLowering::LowerXALUO(SDValue Op, SelectionDAG &DAG) const {
SDValue X86TargetLowering::LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG) const{
DebugLoc dl = Op.getDebugLoc();
- if (!Subtarget->hasSSE2())
+ if (!Subtarget->hasSSE2()) {
+ SDValue Zero = DAG.getConstant(0,
+ Subtarget->is64Bit() ? MVT::i64 : MVT::i32);
return DAG.getNode(X86ISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0),
- DAG.getConstant(0, MVT::i32));
+ Zero);
+ }
unsigned isDev = cast<ConstantSDNode>(Op.getOperand(5))->getZExtValue();
if(!isDev)
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td
index 9c7c80f..04b75f9 100644
--- a/lib/Target/X86/X86Instr64bit.td
+++ b/lib/Target/X86/X86Instr64bit.td
@@ -1619,6 +1619,13 @@ def MOV64FSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src),
// Atomic Instructions
//===----------------------------------------------------------------------===//
+// TODO: Get this to fold the constant into the instruction.
+let Defs = [ESP] in
+def Int_MemBarrierNoSSE64 : RI<0x09, MRM1r, (outs), (ins GR64:$zero),
+ "lock\n\t"
+ "or{q}\t{$zero, (%rsp)|(%rsp), $zero}",
+ [(X86MemBarrierNoSSE GR64:$zero)]>, LOCK;
+
let Defs = [RAX, EFLAGS], Uses = [RAX] in {
def LCMPXCHG64 : RI<0xB1, MRMDestMem, (outs), (ins i64mem:$ptr, GR64:$swap),
"lock\n\t"
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 367e29c..5fc1bb7 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -3934,8 +3934,8 @@ def Int_MemBarrier : I<0, Pseudo, (outs), (ins),
[(X86MemBarrier)]>, Requires<[HasSSE2]>;
// TODO: Get this to fold the constant into the instruction.
-let Uses = [ESP] in
-def Int_MemBarrierNoSSE : I<0x0B, Pseudo, (outs), (ins GR32:$zero),
+let Defs = [ESP] in
+def Int_MemBarrierNoSSE : I<0x09, MRM1r, (outs), (ins GR32:$zero),
"lock\n\t"
"or{l}\t{$zero, (%esp)|(%esp), $zero}",
[(X86MemBarrierNoSSE GR32:$zero)]>, LOCK;