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author | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-27 16:40:26 +0000 |
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committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-06-27 16:40:26 +0000 |
commit | b72bcbb42b5fba50a7dc6cfc6d3b734886321694 (patch) | |
tree | c846a9447b1ecd49068fba3912fc55507b27609d /lib/Target | |
parent | 98f0eee40692393ca4591b3a8988cc543bd691b5 (diff) | |
download | external_llvm-b72bcbb42b5fba50a7dc6cfc6d3b734886321694.zip external_llvm-b72bcbb42b5fba50a7dc6cfc6d3b734886321694.tar.gz external_llvm-b72bcbb42b5fba50a7dc6cfc6d3b734886321694.tar.bz2 |
missed a load
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22295 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/Alpha/AlphaISelPattern.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 9c9b3d6..f1a9191 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp @@ -265,9 +265,6 @@ AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) MachineBasicBlock& BB = MF.front(); - //Handle the return address - //BuildMI(&BB, Alpha::IDEF, 0, Alpha::R26); - unsigned args_int[] = {Alpha::R16, Alpha::R17, Alpha::R18, Alpha::R19, Alpha::R20, Alpha::R21}; unsigned args_float[] = {Alpha::F16, Alpha::F17, Alpha::F18, @@ -1307,6 +1304,13 @@ unsigned AlphaISel::SelectExprFP(SDOperand N, unsigned Result) SDOperand Address = N.getOperand(1); Select(Chain); + if (EnableAlphaLSMark) + { + int i = getValueOffset(dyn_cast<SrcValueSDNode>(N.getOperand(2))->getValue()); + int j = getFunctionOffset(BB->getParent()->getFunction()); + BuildMI(BB, Alpha::MEMLABEL, 3).addImm(j).addImm(i).addImm(getUID()); + } + if (Address.getOpcode() == ISD::GlobalAddress) { AlphaLowering.restoreGP(BB); has_sym = true; |