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author | Tom Stellard <thomas.stellard@amd.com> | 2013-10-16 17:05:56 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2013-10-16 17:05:56 +0000 |
commit | c4822e0518f3ca547065424679ff4297dd8bb426 (patch) | |
tree | 7e000e00c2177af8ac6ee36df29e902df03fd1e1 /lib/Target | |
parent | 303fe16ea2ffbd4dcdc4b9d01510fc630ad8028e (diff) | |
download | external_llvm-c4822e0518f3ca547065424679ff4297dd8bb426.zip external_llvm-c4822e0518f3ca547065424679ff4297dd8bb426.tar.gz external_llvm-c4822e0518f3ca547065424679ff4297dd8bb426.tar.bz2 |
R600: Remove some dead code from the AMDILCFGStructurizer
Reviewed-by: Vincent Lejeune<vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192812 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/R600/AMDILCFGStructurizer.cpp | 25 |
1 files changed, 4 insertions, 21 deletions
diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/R600/AMDILCFGStructurizer.cpp index 80190c9..f88d593 100644 --- a/lib/Target/R600/AMDILCFGStructurizer.cpp +++ b/lib/Target/R600/AMDILCFGStructurizer.cpp @@ -1335,32 +1335,11 @@ int AMDGPUCFGStructurizer::improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB, // add initReg = initVal to headBlk const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32); - unsigned InitReg = - HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC); if (!MigrateTrue || !MigrateFalse) llvm_unreachable("Extra register needed to handle CFG"); int NumNewBlk = 0; - if (!LandBlk) { - LandBlk = HeadMBB->getParent()->CreateMachineBasicBlock(); - HeadMBB->getParent()->push_back(LandBlk); //insert to function - - if (TrueMBB) { - TrueMBB->addSuccessor(LandBlk); - } else { - HeadMBB->addSuccessor(LandBlk); - } - - if (FalseMBB) { - FalseMBB->addSuccessor(LandBlk); - } else { - HeadMBB->addSuccessor(LandBlk); - } - - NumNewBlk ++; - } - bool LandBlkHasOtherPred = (LandBlk->pred_size() > 2); //insert AMDGPU::ENDIF to avoid special case "input landBlk == NULL" @@ -1375,6 +1354,10 @@ int AMDGPUCFGStructurizer::improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB, CmpResReg, DebugLoc()); } + // XXX: We are running this after RA, so creating virtual registers will + // cause an assertion failure in the PostRA scheduling pass. + unsigned InitReg = + HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC); insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET, InitReg, DebugLoc()); |