Factor out the code to add a MachineOperand to a MachineInstrBuilder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64891 91177308-0d34-0410-b5e6-96231b3b80d8

8 files changed, 38 insertions, 159 deletions

diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index 9dc0785..3277896 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -509,20 +509,6 @@ bool ARMInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
   return true;
 }
 
-static const MachineInstrBuilder &ARMInstrAddOperand(MachineInstrBuilder &MIB,
-                                                     MachineOperand &MO) {
-  if (MO.isReg())
-    MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit());
-  else if (MO.isImm())
-    MIB = MIB.addImm(MO.getImm());
-  else if (MO.isFI())
-    MIB = MIB.addFrameIndex(MO.getIndex());
-  else
-    assert(0 && "Unknown operand for ARMInstrAddOperand!");
-
-  return MIB;
-}
-
 void ARMInstrInfo::
 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
                     unsigned SrcReg, bool isKill, int FI,
@@ -567,7 +553,7 @@ void ARMInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
       MachineInstrBuilder MIB = 
         BuildMI(MF, DL,  get(Opc)).addReg(SrcReg, false, false, isKill);
       for (unsigned i = 0, e = Addr.size(); i != e; ++i)
-        MIB = ARMInstrAddOperand(MIB, Addr[i]);
+        MIB.addOperand(Addr[i]);
       NewMIs.push_back(MIB);
       return;
     }
@@ -582,7 +568,7 @@ void ARMInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
   MachineInstrBuilder MIB = 
     BuildMI(MF, DL, get(Opc)).addReg(SrcReg, false, false, isKill);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
-    MIB = ARMInstrAddOperand(MIB, Addr[i]);
+    MIB.addOperand(Addr[i]);
   AddDefaultPred(MIB);
   NewMIs.push_back(MIB);
   return;
@@ -626,7 +612,7 @@ void ARMInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
       Opc = Addr[0].isFI() ? ARM::tRestore : ARM::tLDR;
       MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
       for (unsigned i = 0, e = Addr.size(); i != e; ++i)
-        MIB = ARMInstrAddOperand(MIB, Addr[i]);
+        MIB.addOperand(Addr[i]);
       NewMIs.push_back(MIB);
       return;
     }
@@ -640,7 +626,7 @@ void ARMInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
 
   MachineInstrBuilder MIB =  BuildMI(MF, DL, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
-    MIB = ARMInstrAddOperand(MIB, Addr[i]);
+    MIB.addOperand(Addr[i]);
   AddDefaultPred(MIB);
   NewMIs.push_back(MIB);
   return;
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp
index 73e9b7b..27408e2 100644
--- a/lib/Target/Alpha/AlphaInstrInfo.cpp
+++ b/lib/Target/Alpha/AlphaInstrInfo.cpp
@@ -218,13 +218,8 @@ void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = 
     BuildMI(MF, DL, get(Opc)).addReg(SrcReg, false, false, isKill);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit());
-    else
-      MIB.addImm(MO.getImm());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
 }
 
@@ -267,13 +262,8 @@ void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = 
     BuildMI(MF, DL, get(Opc), DestReg);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit());
-    else
-      MIB.addImm(MO.getImm());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
 }
 
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp
index 439daae..032eb14 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -352,15 +352,8 @@ void SPUInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
     DebugLoc DL = DebugLoc::getUnknownLoc();
     MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
       .addReg(SrcReg, false, false, isKill);
-    for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-      MachineOperand &MO = Addr[i];
-      if (MO.isReg())
-        MIB.addReg(MO.getReg());
-      else if (MO.isImm())
-        MIB.addImm(MO.getImm());
-      else
-        MIB.addFrameIndex(MO.getIndex());
-    }
+    for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+      MIB.addOperand(Addr[i]);
     NewMIs.push_back(MIB);
   }
 }
@@ -434,15 +427,8 @@ void SPUInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
     }
     DebugLoc DL = DebugLoc::getUnknownLoc();
     MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
-    for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-      MachineOperand &MO = Addr[i];
-      if (MO.isReg())
-        MIB.addReg(MO.getReg());
-      else if (MO.isImm())
-        MIB.addImm(MO.getImm());
-      else
-        MIB.addFrameIndex(MO.getIndex());
-    }
+    for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+      MIB.addOperand(Addr[i]);
     NewMIs.push_back(MIB);
   }
 }
diff --git a/lib/Target/IA64/IA64InstrInfo.cpp b/lib/Target/IA64/IA64InstrInfo.cpp
index 8f9a094..65eff25 100644
--- a/lib/Target/IA64/IA64InstrInfo.cpp
+++ b/lib/Target/IA64/IA64InstrInfo.cpp
@@ -134,15 +134,8 @@ void IA64InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
 
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else
-      MIB.addFrameIndex(MO.getIndex());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   MIB.addReg(SrcReg, false, false, isKill);
   NewMIs.push_back(MIB);
   return;
@@ -193,15 +186,8 @@ void IA64InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
 
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else
-      MIB.addFrameIndex(MO.getIndex());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
   return;
 }
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp
index 16de511..f2232b1 100644
--- a/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/lib/Target/Mips/MipsInstrInfo.cpp
@@ -228,15 +228,8 @@ void MipsInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
     .addReg(SrcReg, false, false, isKill);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else
-      MIB.addFrameIndex(MO.getIndex());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
   return;
 }
@@ -281,15 +274,8 @@ void MipsInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
 
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else
-      MIB.addFrameIndex(MO.getIndex());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
   return;
 }
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index 50c80c4..45f3631 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -511,15 +511,8 @@ void PPCInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
   }
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
     .addReg(SrcReg, false, false, isKill);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else
-      MIB.addFrameIndex(MO.getIndex());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
   return;
 }
@@ -650,15 +643,8 @@ void PPCInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
   }
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else
-      MIB.addFrameIndex(MO.getIndex());
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
   return;
 }
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index c2845c7..7c230ec 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -179,17 +179,8 @@ void SparcInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
   else
     assert(0 && "Can't load this register");
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else {
-      assert(MO.isFI());
-      MIB.addFrameIndex(MO.getIndex());
-    }
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   MIB.addReg(SrcReg, false, false, isKill);
   NewMIs.push_back(MIB);
   return;
@@ -227,17 +218,8 @@ void SparcInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
     assert(0 && "Can't load this register");
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
-  for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
-    MachineOperand &MO = Addr[i];
-    if (MO.isReg())
-      MIB.addReg(MO.getReg());
-    else if (MO.isImm())
-      MIB.addImm(MO.getImm());
-    else {
-      assert(MO.isFI());
-      MIB.addFrameIndex(MO.getIndex());
-    }
-  }
+  for (unsigned i = 0, e = Addr.size(); i != e; ++i)
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
   return;
 }
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 5460b8d..6e3b351 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -1603,29 +1603,6 @@ unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
   return Count;
 }
 
-static const MachineInstrBuilder &X86InstrAddOperand(MachineInstrBuilder &MIB,
-                                                     const MachineOperand &MO) {
-  if (MO.isReg())
-    MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit(),
-                     MO.isKill(), MO.isDead(), MO.getSubReg());
-  else if (MO.isImm())
-    MIB = MIB.addImm(MO.getImm());
-  else if (MO.isFI())
-    MIB = MIB.addFrameIndex(MO.getIndex());
-  else if (MO.isGlobal())
-    MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset());
-  else if (MO.isCPI())
-    MIB = MIB.addConstantPoolIndex(MO.getIndex(), MO.getOffset());
-  else if (MO.isJTI())
-    MIB = MIB.addJumpTableIndex(MO.getIndex());
-  else if (MO.isSymbol())
-    MIB = MIB.addExternalSymbol(MO.getSymbolName());
-  else
-    assert(0 && "Unknown operand for X86InstrAddOperand!");
-
-  return MIB;
-}
-
 unsigned
 X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
                            MachineBasicBlock *FBB,
@@ -1855,7 +1832,7 @@ void X86InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc));
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
-    MIB = X86InstrAddOperand(MIB, Addr[i]);
+    MIB.addOperand(Addr[i]);
   MIB.addReg(SrcReg, false, false, isKill);
   NewMIs.push_back(MIB);
 }
@@ -1921,7 +1898,7 @@ void X86InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
   for (unsigned i = 0, e = Addr.size(); i != e; ++i)
-    MIB = X86InstrAddOperand(MIB, Addr[i]);
+    MIB.addOperand(Addr[i]);
   NewMIs.push_back(MIB);
 }
 
@@ -1981,7 +1958,7 @@ static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
   MachineInstrBuilder MIB(NewMI);
   unsigned NumAddrOps = MOs.size();
   for (unsigned i = 0; i != NumAddrOps; ++i)
-    MIB = X86InstrAddOperand(MIB, MOs[i]);
+    MIB.addOperand(MOs[i]);
   if (NumAddrOps < 4)  // FrameIndex only
     MIB.addImm(1).addReg(0).addImm(0);
   
@@ -1989,11 +1966,11 @@ static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
   unsigned NumOps = MI->getDesc().getNumOperands()-2;
   for (unsigned i = 0; i != NumOps; ++i) {
     MachineOperand &MO = MI->getOperand(i+2);
-    MIB = X86InstrAddOperand(MIB, MO);
+    MIB.addOperand(MO);
   }
   for (unsigned i = NumOps+2, e = MI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = MI->getOperand(i);
-    MIB = X86InstrAddOperand(MIB, MO);
+    MIB.addOperand(MO);
   }
   return MIB;
 }
@@ -2012,11 +1989,11 @@ static MachineInstr *FuseInst(MachineFunction &MF,
       assert(MO.isReg() && "Expected to fold into reg operand!");
       unsigned NumAddrOps = MOs.size();
       for (unsigned i = 0; i != NumAddrOps; ++i)
-        MIB = X86InstrAddOperand(MIB, MOs[i]);
+        MIB.addOperand(MOs[i]);
       if (NumAddrOps < 4)  // FrameIndex only
         MIB.addImm(1).addReg(0).addImm(0);
     } else {
-      MIB = X86InstrAddOperand(MIB, MO);
+      MIB.addOperand(MO);
     }
   }
   return MIB;
@@ -2030,7 +2007,7 @@ static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
 
   unsigned NumAddrOps = MOs.size();
   for (unsigned i = 0; i != NumAddrOps; ++i)
-    MIB = X86InstrAddOperand(MIB, MOs[i]);
+    MIB.addOperand(MOs[i]);
   if (NumAddrOps < 4)  // FrameIndex only
     MIB.addImm(1).addReg(0).addImm(0);
   return MIB.addImm(0);
@@ -2343,11 +2320,11 @@ bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
   if (FoldedStore)
     MIB.addReg(Reg, true);
   for (unsigned i = 0, e = BeforeOps.size(); i != e; ++i)
-    MIB = X86InstrAddOperand(MIB, BeforeOps[i]);
+    MIB.addOperand(BeforeOps[i]);
   if (FoldedLoad)
     MIB.addReg(Reg);
   for (unsigned i = 0, e = AfterOps.size(); i != e; ++i)
-    MIB = X86InstrAddOperand(MIB, AfterOps[i]);
+    MIB.addOperand(AfterOps[i]);
   for (unsigned i = 0, e = ImpOps.size(); i != e; ++i) {
     MachineOperand &MO = ImpOps[i];
     MIB.addReg(MO.getReg(), MO.isDef(), true, MO.isKill(), MO.isDead());