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author | Eli Friedman <eli.friedman@gmail.com> | 2011-12-28 21:24:44 +0000 |
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committer | Eli Friedman <eli.friedman@gmail.com> | 2011-12-28 21:24:44 +0000 |
commit | da813f420907ad29802ce9e80238258a48385212 (patch) | |
tree | 3c94397f8aa10378a5177d19b7fed7719c58c700 /lib/Target | |
parent | eaf0608891cff27fe4cf08d180a6baf49e00f8ae (diff) | |
download | external_llvm-da813f420907ad29802ce9e80238258a48385212.zip external_llvm-da813f420907ad29802ce9e80238258a48385212.tar.gz external_llvm-da813f420907ad29802ce9e80238258a48385212.tar.bz2 |
Fix type-checking for load transformation which is not legal on floating-point types. PR11674.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147323 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 00b46d2..28cd252 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -13924,7 +13924,8 @@ static SDValue PerformLOADCombine(SDNode *N, SelectionDAG &DAG, // shuffle. We need SSE4 for the shuffles. // TODO: It is possible to support ZExt by zeroing the undef values // during the shuffle phase or after the shuffle. - if (RegVT.isVector() && Ext == ISD::EXTLOAD && Subtarget->hasSSE41()) { + if (RegVT.isVector() && RegVT.isInteger() && + Ext == ISD::EXTLOAD && Subtarget->hasSSE41()) { assert(MemVT != RegVT && "Cannot extend to the same type"); assert(MemVT.isVector() && "Must load a vector from memory"); |