diff options
author | Evan Cheng <evan.cheng@apple.com> | 2009-02-09 07:14:22 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-02-09 07:14:22 +0000 |
commit | dc54d317e7a381ef8e4aca80d54ad1466bb85dda (patch) | |
tree | f270708392612a47df3c09a023d1541097ae3147 /lib/Target | |
parent | 0de5d6fce05dcdb6e9ea2368f02b936b0c50aacf (diff) | |
download | external_llvm-dc54d317e7a381ef8e4aca80d54ad1466bb85dda.zip external_llvm-dc54d317e7a381ef8e4aca80d54ad1466bb85dda.tar.gz external_llvm-dc54d317e7a381ef8e4aca80d54ad1466bb85dda.tar.bz2 |
Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty
suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 9 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.h | 3 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.h | 3 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.cpp | 6 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.h | 3 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 6 | ||||
-rw-r--r-- | lib/Target/Mips/MipsInstrInfo.h | 3 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 6 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.h | 3 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 3 | ||||
-rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.h | 3 |
14 files changed, 49 insertions, 23 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index bbe5a10..0c55f93 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -335,7 +335,8 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, // Branch analysis. bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const { + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -385,7 +386,8 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, (LastOpc == ARM::B || LastOpc == ARM::tB)) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; - I->eraseFromParent(); + if (AllowModify) + I->eraseFromParent(); return false; } @@ -396,7 +398,8 @@ bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, SecondLastOpc == ARM::BR_JTadd || SecondLastOpc==ARM::tBR_JTr) && (LastOpc == ARM::B || LastOpc == ARM::tB)) { I = LastInst; - I->eraseFromParent(); + if (AllowModify) + I->eraseFromParent(); return true; } diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h index 043f6e5..13ff3fe 100644 --- a/lib/Target/ARM/ARMInstrInfo.h +++ b/lib/Target/ARM/ARMInstrInfo.h @@ -172,7 +172,8 @@ public: // Branch analysis. virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index 2c7404d..0974699 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -321,8 +321,9 @@ static unsigned AlphaRevCondCode(unsigned Opcode) { // Branch analysis. bool AlphaInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, - MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const { + MachineBasicBlock *&FBB, + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -373,7 +374,8 @@ bool AlphaInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TB LastInst->getOpcode() == Alpha::BR) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; - I->eraseFromParent(); + if (AllowModify) + I->eraseFromParent(); return false; } diff --git a/lib/Target/Alpha/AlphaInstrInfo.h b/lib/Target/Alpha/AlphaInstrInfo.h index 85f5a54..182aa32 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.h +++ b/lib/Target/Alpha/AlphaInstrInfo.h @@ -83,7 +83,8 @@ public: bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const; unsigned RemoveBranch(MachineBasicBlock &MBB) const; void insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const; diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index 559f095..ded8324 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -524,7 +524,8 @@ SPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, bool SPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const { + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -575,7 +576,8 @@ SPUInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, if (isUncondBranch(SecondLastInst) && isUncondBranch(LastInst)) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; - I->eraseFromParent(); + if (AllowModify) + I->eraseFromParent(); return false; } diff --git a/lib/Target/CellSPU/SPUInstrInfo.h b/lib/Target/CellSPU/SPUInstrInfo.h index 6fa2454..ffb4087 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.h +++ b/lib/Target/CellSPU/SPUInstrInfo.h @@ -100,7 +100,8 @@ namespace llvm { virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index daff538..758e9be 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -453,7 +453,8 @@ Mips::CondCode Mips::GetOppositeBranchCondition(Mips::CondCode CC) bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); @@ -525,7 +526,8 @@ bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, if ((SecondLastOpc == Mips::J) && (LastOpc == Mips::J)) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; - I->eraseFromParent(); + if (AllowModify) + I->eraseFromParent(); return false; } diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index f633776..334244e 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -166,7 +166,8 @@ public: /// Branch Analysis virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index b008a1d..3e0c7e7 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -204,7 +204,8 @@ void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, // Branch analysis. bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const { + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -253,7 +254,8 @@ bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, LastInst->getOpcode() == PPC::B) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; - I->eraseFromParent(); + if (AllowModify) + I->eraseFromParent(); return false; } diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h index cea6873..f190398 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.h +++ b/lib/Target/PowerPC/PPCInstrInfo.h @@ -104,7 +104,8 @@ public: // Branch analysis. virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index dcf9f60..dfd299b 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -1488,7 +1488,8 @@ static bool isBrAnalysisUnpredicatedTerminator(const MachineInstr *MI, bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const { + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const { // Start from the bottom of the block and work up, examining the // terminator instructions. MachineBasicBlock::iterator I = MBB.end(); @@ -1504,6 +1505,11 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, return true; // Handle unconditional branches. if (I->getOpcode() == X86::JMP) { + if (!AllowModify) { + TBB = I->getOperand(0).getMBB(); + return false; + } + // If the block has any instructions after a JMP, delete them. while (next(I) != MBB.end()) next(I)->eraseFromParent(); diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 586b5ad..f5b0cc9 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -323,7 +323,8 @@ public: virtual bool isUnpredicatedTerminator(const MachineInstr* MI) const; virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const; virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, diff --git a/lib/Target/XCore/XCoreInstrInfo.cpp b/lib/Target/XCore/XCoreInstrInfo.cpp index 1a16fe0..98b4e5c 100644 --- a/lib/Target/XCore/XCoreInstrInfo.cpp +++ b/lib/Target/XCore/XCoreInstrInfo.cpp @@ -228,8 +228,9 @@ static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) /// bool XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, - MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const { + MachineBasicBlock *&FBB, + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -288,7 +289,8 @@ XCoreInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, IsBRU(LastInst->getOpcode())) { TBB = SecondLastInst->getOperand(0).getMBB(); I = LastInst; - I->eraseFromParent(); + if (AllowModify) + I->eraseFromParent(); return false; } diff --git a/lib/Target/XCore/XCoreInstrInfo.h b/lib/Target/XCore/XCoreInstrInfo.h index a2c1e67..965ad36 100644 --- a/lib/Target/XCore/XCoreInstrInfo.h +++ b/lib/Target/XCore/XCoreInstrInfo.h @@ -56,7 +56,8 @@ public: virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - SmallVectorImpl<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond, + bool AllowModify) const; virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, |