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authorScott Michel <scottm@aero.org>2008-11-20 16:36:33 +0000
committerScott Michel <scottm@aero.org>2008-11-20 16:36:33 +0000
commitdc91bea4793f090021e308a3494e279f12f66a75 (patch)
tree7df12682f470e3e4125b91d707b9b62092d932e7 /lib/Target
parent810260bf6b4af4c676705d77f0a96c22986610fb (diff)
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CellSPU:
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy. (b) Remove truncated stores that will never be used. (c) Add initial support for __muldi3 as a libcall. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59734 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/CellSPU/SPUAsmPrinter.cpp0
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.cpp11
2 files changed, 5 insertions, 6 deletions
diff --git a/lib/Target/CellSPU/SPUAsmPrinter.cpp b/lib/Target/CellSPU/SPUAsmPrinter.cpp
deleted file mode 100644
index e69de29..0000000
--- a/lib/Target/CellSPU/SPUAsmPrinter.cpp
+++ /dev/null
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp
index 1ed3bab..1cd0097 100644
--- a/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -130,15 +130,13 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
addRegisterClass(MVT::f64, SPU::R64FPRegisterClass);
addRegisterClass(MVT::i128, SPU::GPRCRegisterClass);
+ // Initialize libcalls:
+ setLibcallName(RTLIB::MUL_I64, "__muldi3");
+
// SPU has no sign or zero extended loads for i1, i8, i16:
setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
- setTruncStoreAction(MVT::i8, MVT::i1, Custom);
- setTruncStoreAction(MVT::i16, MVT::i1, Custom);
- setTruncStoreAction(MVT::i32, MVT::i1, Custom);
- setTruncStoreAction(MVT::i64, MVT::i1, Custom);
- setTruncStoreAction(MVT::i128, MVT::i1, Custom);
setLoadExtAction(ISD::EXTLOAD, MVT::i8, Custom);
setLoadExtAction(ISD::SEXTLOAD, MVT::i8, Custom);
@@ -212,6 +210,7 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
setOperationAction(ISD::ROTL, MVT::i32, Legal);
setOperationAction(ISD::ROTL, MVT::i16, Legal);
setOperationAction(ISD::ROTL, MVT::i8, Custom);
+
// SPU has no native version of shift left/right for i8
setOperationAction(ISD::SHL, MVT::i8, Custom);
setOperationAction(ISD::SRL, MVT::i8, Custom);
@@ -224,7 +223,7 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
// Custom lower i8, i32 and i64 multiplications
setOperationAction(ISD::MUL, MVT::i8, Custom);
setOperationAction(ISD::MUL, MVT::i32, Custom);
- setOperationAction(ISD::MUL, MVT::i64, Custom);
+ setOperationAction(ISD::MUL, MVT::i64, Expand);
// Need to custom handle (some) common i8, i64 math ops
setOperationAction(ISD::ADD, MVT::i64, Custom);