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authorEvan Cheng <evan.cheng@apple.com>2006-04-11 18:04:57 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-04-11 18:04:57 +0000
commitdf3c33c57e16eb32c88bd1160fd9b6369ab23832 (patch)
treede5cde00cde2fdd3f7fbd0ef2be789ceedf76cad /lib/Target
parent135c6a9d838dfd85835eb7756cba81f7dc297db4 (diff)
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gcc lower SSE prefetch into generic prefetch intrinsic. Need to add support
later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27591 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/X86/X86InstrSSE.td12
1 files changed, 4 insertions, 8 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 9bb1f74..10f4d56 100644
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -1517,17 +1517,13 @@ def MASKMOVDQU : PDI<0xF7, RawFrm, (ops VR128:$src, VR128:$mask),
// Prefetching loads
def PREFETCHT0 : PSI<0x18, MRM1m, (ops i8mem:$src),
- "prefetcht0 $src",
- [(int_x86_sse_prefetch addr:$src, 1)]>;
+ "prefetcht0 $src", []>;
def PREFETCHT1 : PSI<0x18, MRM2m, (ops i8mem:$src),
- "prefetcht1 $src",
- [(int_x86_sse_prefetch addr:$src, 2)]>;
+ "prefetcht1 $src", []>;
def PREFETCHT2 : PSI<0x18, MRM3m, (ops i8mem:$src),
- "prefetcht2 $src",
- [(int_x86_sse_prefetch addr:$src, 3)]>;
+ "prefetcht2 $src", []>;
def PREFETCHTNTA : PSI<0x18, MRM0m, (ops i8mem:$src),
- "prefetchtnta $src",
- [(int_x86_sse_prefetch addr:$src, 0)]>;
+ "prefetchtnta $src", []>;
// Non-temporal stores
def MOVNTPSmr : PSI<0x2B, MRMDestMem, (ops i128mem:$dst, VR128:$src),