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author | Aaron Watry <awatry@gmail.com> | 2013-06-25 13:55:43 +0000 |
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committer | Aaron Watry <awatry@gmail.com> | 2013-06-25 13:55:43 +0000 |
commit | e80978f9dd6bd8951d968fd2e85ec4c0996b62f5 (patch) | |
tree | f5b1141f5f175c4e4a32ca21dc8abb2139204d77 /lib/Target | |
parent | c1fcf01d7fa41171fc715618d0a9359df7865aa6 (diff) | |
download | external_llvm-e80978f9dd6bd8951d968fd2e85ec4c0996b62f5.zip external_llvm-e80978f9dd6bd8951d968fd2e85ec4c0996b62f5.tar.gz external_llvm-e80978f9dd6bd8951d968fd2e85ec4c0996b62f5.tar.bz2 |
R600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG
Also add lit test for both cases on SI, and v2i32 for evergreen.
Note: I followed the guidance of the v4i32 EG check... UDIV produces really
complex code, so let's just check that the instruction was lowered
successfully.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184843 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r-- | lib/Target/R600/R600ISelLowering.cpp | 1 | ||||
-rw-r--r-- | lib/Target/R600/SIISelLowering.cpp | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp index 812df83..cf349a8 100644 --- a/lib/Target/R600/R600ISelLowering.cpp +++ b/lib/Target/R600/R600ISelLowering.cpp @@ -56,6 +56,7 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) : setOperationAction(ISD::SUB, MVT::v4i32, Expand); setOperationAction(ISD::SUB, MVT::v2i32, Expand); setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Expand); + setOperationAction(ISD::UDIV, MVT::v2i32, Expand); setOperationAction(ISD::UDIV, MVT::v4i32, Expand); setOperationAction(ISD::UREM, MVT::v4i32, Expand); setOperationAction(ISD::SETCC, MVT::v4i32, Expand); diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 5f44d3a..1fb28fa 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -87,6 +87,9 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) : setOperationAction(ISD::SUB, MVT::v2i32, Expand); setOperationAction(ISD::SUB, MVT::v4i32, Expand); + setOperationAction(ISD::UDIV, MVT::v2i32, Expand); + setOperationAction(ISD::UDIV, MVT::v4i32, Expand); + setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); |