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authorMatt Arsenault <Matthew.Arsenault@amd.com>2013-11-18 20:09:32 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2013-11-18 20:09:32 +0000
commitf53b7841a1f173cb06a42e59e549b2759063bb97 (patch)
tree3b9b9b1d0d04d678409f2ee4b9f53023b46f715f /lib/Target
parent3e38856f04a01651819c6bc16fac4434a5d2b4c6 (diff)
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R600/SI: Specify S_ADD/S_SUB set SCC and add is commutable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195035 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/R600/SIInstructions.td14
1 files changed, 13 insertions, 1 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
index 7747d6a..9f57931 100644
--- a/lib/Target/R600/SIInstructions.td
+++ b/lib/Target/R600/SIInstructions.td
@@ -1126,17 +1126,29 @@ def V_DIV_FMAS_F64 : VOP3_64 <0x00000170, "V_DIV_FMAS_F64", []>;
//def V_QSAD_U8 : VOP3_U8 <0x00000172, "V_QSAD_U8", []>;
//def V_MQSAD_U8 : VOP3_U8 <0x00000173, "V_MQSAD_U8", []>;
def V_TRIG_PREOP_F64 : VOP3_64 <0x00000174, "V_TRIG_PREOP_F64", []>;
+
+let Defs = [SCC] in { // Carry out goes to SCC
+let isCommutable = 1 in {
def S_ADD_U32 : SOP2_32 <0x00000000, "S_ADD_U32", []>;
-def S_SUB_U32 : SOP2_32 <0x00000001, "S_SUB_U32", []>;
def S_ADD_I32 : SOP2_32 <0x00000002, "S_ADD_I32",
[(set i32:$dst, (add i32:$src0, i32:$src1))]
>;
+} // End isCommutable = 1
+
+def S_SUB_U32 : SOP2_32 <0x00000001, "S_SUB_U32", []>;
def S_SUB_I32 : SOP2_32 <0x00000003, "S_SUB_I32",
[(set i32:$dst, (sub i32:$src0, i32:$src1))]
>;
+let Uses = [SCC] in { // Carry in comes from SCC
+let isCommutable = 1 in {
def S_ADDC_U32 : SOP2_32 <0x00000004, "S_ADDC_U32", []>;
+} // End isCommutable = 1
+
def S_SUBB_U32 : SOP2_32 <0x00000005, "S_SUBB_U32", []>;
+} // End Uses = [SCC]
+} // End Defs = [SCC]
+
def S_MIN_I32 : SOP2_32 <0x00000006, "S_MIN_I32", []>;
def S_MIN_U32 : SOP2_32 <0x00000007, "S_MIN_U32", []>;
def S_MAX_I32 : SOP2_32 <0x00000008, "S_MAX_I32", []>;