Revert "Fix the build broken by r189315." and "Move everything depending on Object/MachOFormat.h over to Support/MachO.h."

This reverts commits r189319 and r189315. r189315 broke some tests on what I
believe are big-endian platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189321 91177308-0d34-0410-b5e6-96231b3b80d8

7 files changed, 211 insertions, 211 deletions

diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 828442f..b1e25d8 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -25,9 +25,9 @@
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCValue.h"
+#include "llvm/Object/MachOFormat.h"
 #include "llvm/Support/ELF.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MachO.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
@@ -640,16 +640,16 @@ public:
 // FIXME: This should be in a separate file.
 class DarwinARMAsmBackend : public ARMAsmBackend {
 public:
-  const MachO::CPUSubTypeARM Subtype;
+  const object::mach::CPUSubtypeARM Subtype;
   DarwinARMAsmBackend(const Target &T, const StringRef TT,
-                      MachO::CPUSubTypeARM st)
+                      object::mach::CPUSubtypeARM st)
     : ARMAsmBackend(T, TT), Subtype(st) {
       HasDataInCodeSupport = true;
     }
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
     return createARMMachObjectWriter(OS, /*Is64Bit=*/false,
-                                     MachO::CPU_TYPE_ARM,
+                                     object::mach::CTM_ARM,
                                      Subtype);
   }
 
@@ -664,18 +664,18 @@ MCAsmBackend *llvm::createARMAsmBackend(const Target &T, StringRef TT, StringRef
   Triple TheTriple(TT);
 
   if (TheTriple.isOSDarwin()) {
-    MachO::CPUSubTypeARM CS =
-      StringSwitch<MachO::CPUSubTypeARM>(TheTriple.getArchName())
-      .Cases("armv4t", "thumbv4t", MachO::CPU_SUBTYPE_ARM_V4T)
-      .Cases("armv5e", "thumbv5e", MachO::CPU_SUBTYPE_ARM_V5TEJ)
-      .Cases("armv6", "thumbv6", MachO::CPU_SUBTYPE_ARM_V6)
-      .Cases("armv6m", "thumbv6m", MachO::CPU_SUBTYPE_ARM_V6M)
-      .Cases("armv7em", "thumbv7em", MachO::CPU_SUBTYPE_ARM_V7EM)
-      .Cases("armv7f", "thumbv7f", MachO::CPU_SUBTYPE_ARM_V7F)
-      .Cases("armv7k", "thumbv7k", MachO::CPU_SUBTYPE_ARM_V7K)
-      .Cases("armv7m", "thumbv7m", MachO::CPU_SUBTYPE_ARM_V7M)
-      .Cases("armv7s", "thumbv7s", MachO::CPU_SUBTYPE_ARM_V7S)
-      .Default(MachO::CPU_SUBTYPE_ARM_V7);
+    object::mach::CPUSubtypeARM CS =
+      StringSwitch<object::mach::CPUSubtypeARM>(TheTriple.getArchName())
+      .Cases("armv4t", "thumbv4t", object::mach::CSARM_V4T)
+      .Cases("armv5e", "thumbv5e",object::mach::CSARM_V5TEJ)
+      .Cases("armv6", "thumbv6", object::mach::CSARM_V6)
+      .Cases("armv6m", "thumbv6m", object::mach::CSARM_V6M)
+      .Cases("armv7em", "thumbv7em", object::mach::CSARM_V7EM)
+      .Cases("armv7f", "thumbv7f", object::mach::CSARM_V7F)
+      .Cases("armv7k", "thumbv7k", object::mach::CSARM_V7K)
+      .Cases("armv7m", "thumbv7m", object::mach::CSARM_V7M)
+      .Cases("armv7s", "thumbv7s", object::mach::CSARM_V7S)
+      .Default(object::mach::CSARM_V7);
 
     return new DarwinARMAsmBackend(T, TT, CS);
   }
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp b/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
index ee43f5f..b9efe74 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp
@@ -20,9 +20,10 @@
 #include "llvm/MC/MCMachOSymbolFlags.h"
 #include "llvm/MC/MCMachObjectWriter.h"
 #include "llvm/MC/MCValue.h"
+#include "llvm/Object/MachOFormat.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MachO.h"
 using namespace llvm;
+using namespace llvm::object;
 
 namespace {
 class ARMMachObjectWriter : public MCMachObjectTargetWriter {
@@ -62,7 +63,7 @@ public:
 
 static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
                               unsigned &Log2Size) {
-  RelocType = unsigned(MachO::ARM_RELOC_VANILLA);
+  RelocType = unsigned(macho::RIT_Vanilla);
   Log2Size = ~0U;
 
   switch (Kind) {
@@ -91,21 +92,21 @@ static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
   case ARM::fixup_arm_uncondbl:
   case ARM::fixup_arm_condbl:
   case ARM::fixup_arm_blx:
-    RelocType = unsigned(MachO::ARM_RELOC_BR24);
+    RelocType = unsigned(macho::RIT_ARM_Branch24Bit);
     // Report as 'long', even though that is not quite accurate.
     Log2Size = llvm::Log2_32(4);
     return true;
 
     // Handle Thumb branches.
   case ARM::fixup_arm_thumb_br:
-    RelocType = unsigned(MachO::ARM_THUMB_RELOC_BR22);
+    RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
     Log2Size = llvm::Log2_32(2);
     return true;
 
   case ARM::fixup_t2_uncondbranch:
   case ARM::fixup_arm_thumb_bl:
   case ARM::fixup_arm_thumb_blx:
-    RelocType = unsigned(MachO::ARM_THUMB_RELOC_BR22);
+    RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
     Log2Size = llvm::Log2_32(4);
     return true;
 
@@ -120,23 +121,23 @@ static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
   //      1 - thumb instructions
   case ARM::fixup_arm_movt_hi16:
   case ARM::fixup_arm_movt_hi16_pcrel:
-    RelocType = unsigned(MachO::ARM_RELOC_HALF);
+    RelocType = unsigned(macho::RIT_ARM_Half);
     Log2Size = 1;
     return true;
   case ARM::fixup_t2_movt_hi16:
   case ARM::fixup_t2_movt_hi16_pcrel:
-    RelocType = unsigned(MachO::ARM_RELOC_HALF);
+    RelocType = unsigned(macho::RIT_ARM_Half);
     Log2Size = 3;
     return true;
 
   case ARM::fixup_arm_movw_lo16:
   case ARM::fixup_arm_movw_lo16_pcrel:
-    RelocType = unsigned(MachO::ARM_RELOC_HALF);
+    RelocType = unsigned(macho::RIT_ARM_Half);
     Log2Size = 0;
     return true;
   case ARM::fixup_t2_movw_lo16:
   case ARM::fixup_t2_movw_lo16_pcrel:
-    RelocType = unsigned(MachO::ARM_RELOC_HALF);
+    RelocType = unsigned(macho::RIT_ARM_Half);
     Log2Size = 2;
     return true;
   }
@@ -152,7 +153,7 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
                                  uint64_t &FixedValue) {
   uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
-  unsigned Type = MachO::ARM_RELOC_HALF;
+  unsigned Type = macho::RIT_ARM_Half;
 
   // See <reloc.h>.
   const MCSymbol *A = &Target.getSymA()->getSymbol();
@@ -178,7 +179,7 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
                          "' can not be undefined in a subtraction expression");
 
     // Select the appropriate difference relocation type.
-    Type = MachO::ARM_RELOC_HALF_SECTDIFF;
+    Type = macho::RIT_ARM_HalfDifference;
     Value2 = Writer->getSymbolAddress(B_SD, Layout);
     FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
   }
@@ -222,28 +223,29 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer,
     break;
   }
 
-  MachO::scattered_relocation_info MRE;
-  if (Type == MachO::ARM_RELOC_HALF_SECTDIFF) {
+  if (Type == macho::RIT_ARM_HalfDifference) {
     uint32_t OtherHalf = MovtBit
       ? (FixedValue & 0xffff) : ((FixedValue & 0xffff0000) >> 16);
 
-    MRE.r_address = OtherHalf;
-    MRE.r_type = MachO::ARM_RELOC_PAIR;
-    MRE.r_length = ((MovtBit  << 0) |
-                    (ThumbBit << 1));
-    MRE.r_pcrel = IsPCRel;
-    MRE.r_scattered = 1;
-    MRE.r_value = Value2;
+    macho::RelocationEntry MRE;
+    MRE.Word0 = ((OtherHalf       <<  0) |
+                 (macho::RIT_Pair << 24) |
+                 (MovtBit         << 28) |
+                 (ThumbBit        << 29) |
+                 (IsPCRel         << 30) |
+                 macho::RF_Scattered);
+    MRE.Word1 = Value2;
     Writer->addRelocation(Fragment->getParent(), MRE);
   }
 
-  MRE.r_address = FixupOffset;
-  MRE.r_type = Type;
-  MRE.r_length = ((MovtBit  << 0) |
-                  (ThumbBit << 1));
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_scattered = 1;
-  MRE.r_value = Value;
+  macho::RelocationEntry MRE;
+  MRE.Word0 = ((FixupOffset <<  0) |
+               (Type        << 24) |
+               (MovtBit     << 28) |
+               (ThumbBit    << 29) |
+               (IsPCRel     << 30) |
+               macho::RF_Scattered);
+  MRE.Word1 = Value;
   Writer->addRelocation(Fragment->getParent(), MRE);
 }
 
@@ -257,7 +259,7 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
                                                     uint64_t &FixedValue) {
   uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
-  unsigned Type = MachO::ARM_RELOC_VANILLA;
+  unsigned Type = macho::RIT_Vanilla;
 
   // See <reloc.h>.
   const MCSymbol *A = &Target.getSymA()->getSymbol();
@@ -282,30 +284,31 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer,
                          "' can not be undefined in a subtraction expression");
 
     // Select the appropriate difference relocation type.
-    Type = MachO::ARM_RELOC_SECTDIFF;
+    Type = macho::RIT_Difference;
     Value2 = Writer->getSymbolAddress(B_SD, Layout);
     FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
   }
 
-  MachO::scattered_relocation_info MRE;
   // Relocations are written out in reverse order, so the PAIR comes first.
-  if (Type == MachO::ARM_RELOC_SECTDIFF ||
-      Type == MachO::ARM_RELOC_LOCAL_SECTDIFF) {
-    MRE.r_address = 0;
-    MRE.r_type = MachO::ARM_RELOC_PAIR;
-    MRE.r_length = Log2Size;
-    MRE.r_pcrel = IsPCRel;
-    MRE.r_scattered = 1;
-    MRE.r_value = Value2;
+  if (Type == macho::RIT_Difference ||
+      Type == macho::RIT_Generic_LocalDifference) {
+    macho::RelocationEntry MRE;
+    MRE.Word0 = ((0         <<  0) |
+                 (macho::RIT_Pair  << 24) |
+                 (Log2Size  << 28) |
+                 (IsPCRel   << 30) |
+                 macho::RF_Scattered);
+    MRE.Word1 = Value2;
     Writer->addRelocation(Fragment->getParent(), MRE);
   }
 
-  MRE.r_address = FixupOffset;
-  MRE.r_type = Type;
-  MRE.r_length = Log2Size;
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_scattered = 1;
-  MRE.r_value = Value;
+  macho::RelocationEntry MRE;
+  MRE.Word0 = ((FixupOffset <<  0) |
+               (Type        << 24) |
+               (Log2Size    << 28) |
+               (IsPCRel     << 30) |
+               macho::RF_Scattered);
+  MRE.Word1 = Value;
   Writer->addRelocation(Fragment->getParent(), MRE);
 }
 
@@ -323,13 +326,13 @@ bool ARMMachObjectWriter::requiresExternRelocation(MachObjectWriter *Writer,
   switch (RelocType) {
   default:
     return false;
-  case MachO::ARM_RELOC_BR24:
+  case macho::RIT_ARM_Branch24Bit:
     // PC pre-adjustment of 8 for these instructions.
     Value -= 8;
     // ARM BL/BLX has a 25-bit offset.
     Range = 0x1ffffff;
     break;
-  case MachO::ARM_THUMB_RELOC_BR22:
+  case macho::RIT_ARM_ThumbBranch22Bit:
     // PC pre-adjustment of 4 for these instructions.
     Value -= 4;
     // Thumb BL/BLX has a 24-bit offset.
@@ -358,7 +361,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
                                            uint64_t &FixedValue) {
   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
   unsigned Log2Size;
-  unsigned RelocType = MachO::ARM_RELOC_VANILLA;
+  unsigned RelocType = macho::RIT_Vanilla;
   if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size))
     // If we failed to get fixup kind info, it's because there's no legal
     // relocation type for the fixup kind. This happens when it's a fixup that's
@@ -371,7 +374,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
   // scattered relocation entry.  Differences always require scattered
   // relocations.
   if (Target.getSymB()) {
-    if (RelocType == MachO::ARM_RELOC_HALF)
+    if (RelocType == macho::RIT_ARM_Half)
       return RecordARMScatteredHalfRelocation(Writer, Asm, Layout, Fragment,
                                               Fixup, Target, FixedValue);
     return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
@@ -389,7 +392,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
   //
   // Is this right for ARM?
   uint32_t Offset = Target.getConstant();
-  if (IsPCRel && RelocType == MachO::ARM_RELOC_VANILLA)
+  if (IsPCRel && RelocType == macho::RIT_Vanilla)
     Offset += 1 << Log2Size;
   if (Offset && SD && !Writer->doesSymbolRequireExternRelocation(SD))
     return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
@@ -442,17 +445,17 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
   }
 
   // struct relocation_info (8 bytes)
-  MachO::relocation_info MRE;
-  MRE.r_address = FixupOffset;
-  MRE.r_symbolnum = Index;
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_length = Log2Size;
-  MRE.r_extern = IsExtern;
-  MRE.r_type = Type;
+  macho::RelocationEntry MRE;
+  MRE.Word0 = FixupOffset;
+  MRE.Word1 = ((Index     <<  0) |
+               (IsPCRel   << 24) |
+               (Log2Size  << 25) |
+               (IsExtern  << 27) |
+               (Type      << 28));
 
   // Even when it's not a scattered relocation, movw/movt always uses
   // a PAIR relocation.
-  if (Type == MachO::ARM_RELOC_HALF) {
+  if (Type == macho::RIT_ARM_Half) {
     // The other-half value only gets populated for the movt and movw
     // relocation entries.
     uint32_t Value = 0;
@@ -471,12 +474,11 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer,
       Value = FixedValue & 0xffff;
       break;
     }
-    MachO::relocation_info MREPair;
-    MREPair.r_address = Value;
-    MREPair.r_symbolnum = 0xffffff;
-    MREPair.r_length = Log2Size;
-    MREPair.r_pcrel = MREPair.r_extern = 0;
-    MREPair.r_type = MachO::ARM_RELOC_PAIR;
+    macho::RelocationEntry MREPair;
+    MREPair.Word0 = Value;
+    MREPair.Word1 = ((0xffffff) |
+                     (Log2Size << 25) |
+                     (macho::RIT_Pair << 28));
 
     Writer->addRelocation(Fragment->getParent(), MREPair);
   }
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
index ffeac43..dd61954 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
@@ -16,9 +16,9 @@
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCValue.h"
+#include "llvm/Object/MachOFormat.h"
 #include "llvm/Support/ELF.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MachO.h"
 #include "llvm/Support/TargetRegistry.h"
 using namespace llvm;
 
@@ -164,8 +164,8 @@ namespace {
       return createPPCMachObjectWriter(
           OS,
           /*Is64Bit=*/is64,
-          (is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC),
-          MachO::CPU_SUBTYPE_POWERPC_ALL);
+          (is64 ? object::mach::CTM_PowerPC64 : object::mach::CTM_PowerPC),
+          object::mach::CSPPC_ALL);
     }
 
     virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
index aea3c5b..fc9b892 100644
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMachObjectWriter.cpp
@@ -16,11 +16,12 @@
 #include "llvm/MC/MCMachObjectWriter.h"
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCValue.h"
+#include "llvm/Object/MachOFormat.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Format.h"
-#include "llvm/Support/MachO.h"
 
 using namespace llvm;
+using namespace llvm::object;
 
 namespace {
 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
@@ -89,29 +90,29 @@ static unsigned getRelocType(const MCValue &Target,
       Target.isAbsolute() ? MCSymbolRefExpr::VK_None
                           : Target.getSymA()->getKind();
   // determine the type of the relocation
-  unsigned Type = MachO::GENERIC_RELOC_VANILLA;
+  unsigned Type = macho::RIT_Vanilla;
   if (IsPCRel) { // relative to PC
     switch ((unsigned)FixupKind) {
     default:
       report_fatal_error("Unimplemented fixup kind (relative)");
     case PPC::fixup_ppc_br24:
-      Type = MachO::PPC_RELOC_BR24; // R_PPC_REL24
+      Type = macho::RIT_PPC_BR24; // R_PPC_REL24
       break;
     case PPC::fixup_ppc_brcond14:
-      Type = MachO::PPC_RELOC_BR14;
+      Type = macho::RIT_PPC_BR14;
       break;
     case PPC::fixup_ppc_half16:
       switch (Modifier) {
       default:
         llvm_unreachable("Unsupported modifier for half16 fixup");
       case MCSymbolRefExpr::VK_PPC_HA:
-        Type = MachO::PPC_RELOC_HA16;
+        Type = macho::RIT_PPC_HA16;
         break;
       case MCSymbolRefExpr::VK_PPC_LO:
-        Type = MachO::PPC_RELOC_LO16;
+        Type = macho::RIT_PPC_LO16;
         break;
       case MCSymbolRefExpr::VK_PPC_HI:
-        Type = MachO::PPC_RELOC_HI16;
+        Type = macho::RIT_PPC_HI16;
         break;
       }
       break;
@@ -125,13 +126,13 @@ static unsigned getRelocType(const MCValue &Target,
       default:
         llvm_unreachable("Unsupported modifier for half16 fixup");
       case MCSymbolRefExpr::VK_PPC_HA:
-        Type = MachO::PPC_RELOC_HA16_SECTDIFF;
+        Type = macho::RIT_PPC_HA16_SECTDIFF;
         break;
       case MCSymbolRefExpr::VK_PPC_LO:
-        Type = MachO::PPC_RELOC_LO16_SECTDIFF;
+        Type = macho::RIT_PPC_LO16_SECTDIFF;
         break;
       case MCSymbolRefExpr::VK_PPC_HI:
-        Type = MachO::PPC_RELOC_HI16_SECTDIFF;
+        Type = macho::RIT_PPC_HI16_SECTDIFF;
         break;
       }
       break;
@@ -144,34 +145,30 @@ static unsigned getRelocType(const MCValue &Target,
   return Type;
 }
 
-static void makeRelocationInfo(MachO::any_relocation_info &MRE,
+static void makeRelocationInfo(macho::RelocationEntry &MRE,
                                const uint32_t FixupOffset, const uint32_t Index,
                                const unsigned IsPCRel, const unsigned Log2Size,
                                const unsigned IsExtern, const unsigned Type) {
-  MRE.r_word0 = FixupOffset;
+  MRE.Word0 = FixupOffset;
   // The bitfield offsets that work (as determined by trial-and-error)
   // are different than what is documented in the mach-o manuals.
-  // This appears to be an endianness issue; reversing the order of the
-  // documented bitfields in <llvm/Support/MachO.h> fixes this (but
-  // breaks x86/ARM assembly).
-  MRE.r_word1 = ((Index << 8) |    // was << 0
-                 (IsPCRel << 7) |  // was << 24
-                 (Log2Size << 5) | // was << 25
-                 (IsExtern << 4) | // was << 27
-                 (Type << 0));     // was << 28
+  // Is this an endianness issue w/ PPC?
+  MRE.Word1 = ((Index << 8) |    // was << 0
+               (IsPCRel << 7) |  // was << 24
+               (Log2Size << 5) | // was << 25
+               (IsExtern << 4) | // was << 27
+               (Type << 0));     // was << 28
 }
 
 static void
-makeScatteredRelocationInfo(MachO::scattered_relocation_info &MRE,
-                            const uint32_t Addr, const unsigned Type,
-                            const unsigned Log2Size, const unsigned IsPCRel,
-                            const uint32_t Value2) {
-  MRE.r_scattered = true;
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_length = Log2Size;
-  MRE.r_type = Type;
-  MRE.r_address = Addr;
-  MRE.r_value = Value2;
+makeScatteredRelocationInfo(macho::RelocationEntry &MRE, const uint32_t Addr,
+                            const unsigned Type, const unsigned Log2Size,
+                            const unsigned IsPCRel, const uint32_t Value2) {
+  // For notes on bitfield positions and endianness, see:
+  // https://developer.apple.com/library/mac/documentation/developertools/conceptual/MachORuntime/Reference/reference.html#//apple_ref/doc/uid/20001298-scattered_relocation_entry
+  MRE.Word0 = ((Addr << 0) | (Type << 24) | (Log2Size << 28) | (IsPCRel << 30) |
+               macho::RF_Scattered);
+  MRE.Word1 = Value2;
 }
 
 /// Compute fixup offset (address).
@@ -226,19 +223,18 @@ bool PPCMachObjectWriter::RecordScatteredRelocation(
       report_fatal_error("symbol '" + B->getSymbol().getName() +
                          "' can not be undefined in a subtraction expression");
 
-    // FIXME: is Type correct? see include/llvm/Support/MachO.h
+    // FIXME: is Type correct? see include/llvm/Object/MachOFormat.h
     Value2 = Writer->getSymbolAddress(B_SD, Layout);
     FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
   }
   // FIXME: does FixedValue get used??
 
   // Relocations are written out in reverse order, so the PAIR comes first.
-  if (Type == MachO::PPC_RELOC_SECTDIFF ||
-      Type == MachO::PPC_RELOC_HI16_SECTDIFF ||
-      Type == MachO::PPC_RELOC_LO16_SECTDIFF ||
-      Type == MachO::PPC_RELOC_HA16_SECTDIFF ||
-      Type == MachO::PPC_RELOC_LO14_SECTDIFF ||
-      Type == MachO::PPC_RELOC_LOCAL_SECTDIFF) {
+  if (Type == macho::RIT_PPC_SECTDIFF || Type == macho::RIT_PPC_HI16_SECTDIFF ||
+      Type == macho::RIT_PPC_LO16_SECTDIFF ||
+      Type == macho::RIT_PPC_HA16_SECTDIFF ||
+      Type == macho::RIT_PPC_LO14_SECTDIFF ||
+      Type == macho::RIT_PPC_LOCAL_SECTDIFF) {
     // X86 had this piece, but ARM does not
     // If the offset is too large to fit in a scattered relocation,
     // we're hosed. It's an unfortunate limitation of the MachO format.
@@ -257,7 +253,7 @@ bool PPCMachObjectWriter::RecordScatteredRelocation(
     // see PPCMCExpr::EvaluateAsRelocatableImpl()
     uint32_t other_half = 0;
     switch (Type) {
-    case MachO::PPC_RELOC_LO16_SECTDIFF:
+    case macho::RIT_PPC_LO16_SECTDIFF:
       other_half = (FixedValue >> 16) & 0xffff;
       // applyFixupOffset longer extracts the high part because it now assumes
       // this was already done.
@@ -266,12 +262,12 @@ bool PPCMachObjectWriter::RecordScatteredRelocation(
       // So we need to adjust FixedValue again here.
       FixedValue &= 0xffff;
       break;
-    case MachO::PPC_RELOC_HA16_SECTDIFF:
+    case macho::RIT_PPC_HA16_SECTDIFF:
       other_half = FixedValue & 0xffff;
       FixedValue =
           ((FixedValue >> 16) + ((FixedValue & 0x8000) ? 1 : 0)) & 0xffff;
       break;
-    case MachO::PPC_RELOC_HI16_SECTDIFF:
+    case macho::RIT_PPC_HI16_SECTDIFF:
       other_half = FixedValue & 0xffff;
       FixedValue = (FixedValue >> 16) & 0xffff;
       break;
@@ -280,9 +276,9 @@ bool PPCMachObjectWriter::RecordScatteredRelocation(
       break;
     }
 
-    MachO::scattered_relocation_info MRE;
-    makeScatteredRelocationInfo(MRE, other_half, MachO::GENERIC_RELOC_PAIR,
-                                Log2Size, IsPCRel, Value2);
+    macho::RelocationEntry MRE;
+    makeScatteredRelocationInfo(MRE, other_half, macho::RIT_Pair, Log2Size,
+                                IsPCRel, Value2);
     Writer->addRelocation(Fragment->getParent(), MRE);
   } else {
     // If the offset is more than 24-bits, it won't fit in a scattered
@@ -295,7 +291,7 @@ bool PPCMachObjectWriter::RecordScatteredRelocation(
     if (FixupOffset > 0xffffff)
       return false;
   }
-  MachO::scattered_relocation_info MRE;
+  macho::RelocationEntry MRE;
   makeScatteredRelocationInfo(MRE, FixupOffset, Type, Log2Size, IsPCRel, Value);
   Writer->addRelocation(Fragment->getParent(), MRE);
   return true;
@@ -316,8 +312,7 @@ void PPCMachObjectWriter::RecordPPCRelocation(
   // relocations.
   if (Target.getSymB() &&
       // Q: are branch targets ever scattered?
-      RelocType != MachO::PPC_RELOC_BR24 &&
-      RelocType != MachO::PPC_RELOC_BR14) {
+      RelocType != macho::RIT_PPC_BR24 && RelocType != macho::RIT_PPC_BR14) {
     RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
                               Log2Size, FixedValue);
     return;
@@ -374,7 +369,8 @@ void PPCMachObjectWriter::RecordPPCRelocation(
       FixedValue -= Writer->getSectionAddress(Fragment->getParent());
   }
 
-  MachO::any_relocation_info MRE;
+  // struct relocation_info (8 bytes)
+  macho::RelocationEntry MRE;
   makeRelocationInfo(MRE, FixupOffset, Index, IsPCRel, Log2Size, IsExtern,
                      Type);
   Writer->addRelocation(Fragment->getParent(), MRE);
diff --git a/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index fc3bae3..598ddee 100644
--- a/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -19,10 +19,10 @@
 #include "llvm/MC/MCSectionCOFF.h"
 #include "llvm/MC/MCSectionELF.h"
 #include "llvm/MC/MCSectionMachO.h"
+#include "llvm/Object/MachOFormat.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ELF.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/MachO.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
@@ -395,8 +395,8 @@ public:
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
     return createX86MachObjectWriter(OS, /*Is64Bit=*/false,
-                                     MachO::CPU_TYPE_I386,
-                                     MachO::CPU_SUBTYPE_I386_ALL);
+                                     object::mach::CTM_i386,
+                                     object::mach::CSX86_ALL);
   }
 };
 
@@ -409,8 +409,8 @@ public:
 
   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
     return createX86MachObjectWriter(OS, /*Is64Bit=*/true,
-                                     MachO::CPU_TYPE_X86_64,
-                                     MachO::CPU_SUBTYPE_X86_64_ALL);
+                                     object::mach::CTM_x86_64,
+                                     object::mach::CSX86_ALL);
   }
 
   virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
diff --git a/lib/Target/X86/MCTargetDesc/X86MachORelocationInfo.cpp b/lib/Target/X86/MCTargetDesc/X86MachORelocationInfo.cpp
index 209b1d0..75b5acf 100644
--- a/lib/Target/X86/MCTargetDesc/X86MachORelocationInfo.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MachORelocationInfo.cpp
@@ -17,7 +17,7 @@
 
 using namespace llvm;
 using namespace object;
-using namespace MachO;
+using namespace macho;
 
 namespace {
 class X86_64MachORelocationInfo : public MCRelocationInfo {
@@ -33,7 +33,7 @@ public:
     StringRef SymName; SymI->getName(SymName);
     uint64_t  SymAddr; SymI->getAddress(SymAddr);
 
-    any_relocation_info RE = Obj->getRelocation(Rel.getRawDataRefImpl());
+    RelocationEntry RE = Obj->getRelocation(Rel.getRawDataRefImpl());
     bool isPCRel = Obj->getAnyRelocationPCRel(RE);
 
     MCSymbol *Sym = Ctx.GetOrCreateSymbol(SymName);
@@ -43,44 +43,44 @@ public:
     const MCExpr *Expr = 0;
 
     switch(RelType) {
-    case X86_64_RELOC_TLV:
+    case RIT_X86_64_TLV:
       Expr = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_TLVP, Ctx);
       break;
-    case X86_64_RELOC_SIGNED_4:
+    case RIT_X86_64_Signed4:
       Expr = MCBinaryExpr::CreateAdd(MCSymbolRefExpr::Create(Sym, Ctx),
                                      MCConstantExpr::Create(4, Ctx),
                                      Ctx);
       break;
-    case X86_64_RELOC_SIGNED_2:
+    case RIT_X86_64_Signed2:
       Expr = MCBinaryExpr::CreateAdd(MCSymbolRefExpr::Create(Sym, Ctx),
                                      MCConstantExpr::Create(2, Ctx),
                                      Ctx);
       break;
-    case X86_64_RELOC_SIGNED_1:
+    case RIT_X86_64_Signed1:
       Expr = MCBinaryExpr::CreateAdd(MCSymbolRefExpr::Create(Sym, Ctx),
                                      MCConstantExpr::Create(1, Ctx),
                                      Ctx);
       break;
-    case X86_64_RELOC_GOT_LOAD:
+    case RIT_X86_64_GOTLoad:
       Expr = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_GOTPCREL, Ctx);
       break;
-    case X86_64_RELOC_GOT:
+    case RIT_X86_64_GOT:
       Expr = MCSymbolRefExpr::Create(Sym, isPCRel ?
                                      MCSymbolRefExpr::VK_GOTPCREL :
                                      MCSymbolRefExpr::VK_GOT,
                                      Ctx);
       break;
-    case X86_64_RELOC_SUBTRACTOR:
+    case RIT_X86_64_Subtractor:
       {
         RelocationRef RelNext;
         Obj->getRelocationNext(Rel.getRawDataRefImpl(), RelNext);
-        any_relocation_info RENext = Obj->getRelocation(RelNext.getRawDataRefImpl());
+        RelocationEntry RENext = Obj->getRelocation(RelNext.getRawDataRefImpl());
 
         // X86_64_SUBTRACTOR must be followed by a relocation of type
-        // X86_64_RELOC_UNSIGNED.
+        // X86_64_RELOC_UNSIGNED    .
         // NOTE: Scattered relocations don't exist on x86_64.
         unsigned RType = Obj->getAnyRelocationType(RENext);
-        if (RType != X86_64_RELOC_UNSIGNED)
+        if (RType != RIT_X86_64_Unsigned)
           report_fatal_error("Expected X86_64_RELOC_UNSIGNED after "
                              "X86_64_RELOC_SUBTRACTOR.");
 
diff --git a/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp b/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
index 45437e0..6eff224 100644
--- a/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
@@ -16,11 +16,12 @@
 #include "llvm/MC/MCMachObjectWriter.h"
 #include "llvm/MC/MCSectionMachO.h"
 #include "llvm/MC/MCValue.h"
+#include "llvm/Object/MachOFormat.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Format.h"
-#include "llvm/Support/MachO.h"
 
 using namespace llvm;
+using namespace llvm::object;
 
 namespace {
 class X86MachObjectWriter : public MCMachObjectTargetWriter {
@@ -131,7 +132,7 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
 
   if (Target.isAbsolute()) { // constant
     // SymbolNum of 0 indicates the absolute section.
-    Type = MachO::X86_64_RELOC_UNSIGNED;
+    Type = macho::RIT_X86_64_Unsigned;
     Index = 0;
 
     // FIXME: I believe this is broken, I don't think the linker can understand
@@ -140,7 +141,7 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
     // is to use an absolute symbol (which we don't support yet).
     if (IsPCRel) {
       IsExtern = 1;
-      Type = MachO::X86_64_RELOC_BRANCH;
+      Type = macho::RIT_X86_64_Branch;
     }
   } else if (Target.getSymB()) { // A - B + constant
     const MCSymbol *A = &Target.getSymA()->getSymbol();
@@ -192,15 +193,15 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
       Index = A_SD.getFragment()->getParent()->getOrdinal() + 1;
       IsExtern = 0;
     }
-    Type = MachO::X86_64_RELOC_UNSIGNED;
-
-    MachO::relocation_info MRE;
-    MRE.r_address = FixupOffset;
-    MRE.r_symbolnum = Index;
-    MRE.r_pcrel = IsPCRel;
-    MRE.r_length = Log2Size;
-    MRE.r_extern = IsExtern;
-    MRE.r_type = Type;
+    Type = macho::RIT_X86_64_Unsigned;
+
+    macho::RelocationEntry MRE;
+    MRE.Word0 = FixupOffset;
+    MRE.Word1 = ((Index     <<  0) |
+                 (IsPCRel   << 24) |
+                 (Log2Size  << 25) |
+                 (IsExtern  << 27) |
+                 (Type      << 28));
     Writer->addRelocation(Fragment->getParent(), MRE);
 
     if (B_Base) {
@@ -211,7 +212,7 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
       Index = B_SD.getFragment()->getParent()->getOrdinal() + 1;
       IsExtern = 0;
     }
-    Type = MachO::X86_64_RELOC_SUBTRACTOR;
+    Type = macho::RIT_X86_64_Subtractor;
   } else {
     const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
     MCSymbolData &SD = Asm.getSymbolData(*Symbol);
@@ -271,15 +272,15 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
           // rewrite the movq to an leaq at link time if the symbol ends up in
           // the same linkage unit.
           if (unsigned(Fixup.getKind()) == X86::reloc_riprel_4byte_movq_load)
-            Type = MachO::X86_64_RELOC_GOT_LOAD;
+            Type = macho::RIT_X86_64_GOTLoad;
           else
-            Type = MachO::X86_64_RELOC_GOT;
+            Type = macho::RIT_X86_64_GOT;
         }  else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
-          Type = MachO::X86_64_RELOC_TLV;
+          Type = macho::RIT_X86_64_TLV;
         }  else if (Modifier != MCSymbolRefExpr::VK_None) {
           report_fatal_error("unsupported symbol modifier in relocation");
         } else {
-          Type = MachO::X86_64_RELOC_SIGNED;
+          Type = macho::RIT_X86_64_Signed;
 
           // The Darwin x86_64 relocation format has a problem where it cannot
           // encode an address (L<foo> + <constant>) which is outside the atom
@@ -296,9 +297,9 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
           // (the additional bias), but instead appear to just look at the final
           // offset.
           switch (-(Target.getConstant() + (1LL << Log2Size))) {
-          case 1: Type = MachO::X86_64_RELOC_SIGNED_1; break;
-          case 2: Type = MachO::X86_64_RELOC_SIGNED_2; break;
-          case 4: Type = MachO::X86_64_RELOC_SIGNED_4; break;
+          case 1: Type = macho::RIT_X86_64_Signed1; break;
+          case 2: Type = macho::RIT_X86_64_Signed2; break;
+          case 4: Type = macho::RIT_X86_64_Signed4; break;
           }
         }
       } else {
@@ -306,24 +307,24 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
           report_fatal_error("unsupported symbol modifier in branch "
                              "relocation");
 
-        Type = MachO::X86_64_RELOC_BRANCH;
+        Type = macho::RIT_X86_64_Branch;
       }
     } else {
       if (Modifier == MCSymbolRefExpr::VK_GOT) {
-        Type = MachO::X86_64_RELOC_GOT;
+        Type = macho::RIT_X86_64_GOT;
       } else if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
         // GOTPCREL is allowed as a modifier on non-PCrel instructions, in which
         // case all we do is set the PCrel bit in the relocation entry; this is
         // used with exception handling, for example. The source is required to
         // include any necessary offset directly.
-        Type = MachO::X86_64_RELOC_GOT;
+        Type = macho::RIT_X86_64_GOT;
         IsPCRel = 1;
       } else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
         report_fatal_error("TLVP symbol modifier should have been rip-rel");
       } else if (Modifier != MCSymbolRefExpr::VK_None)
         report_fatal_error("unsupported symbol modifier in relocation");
       else
-        Type = MachO::X86_64_RELOC_UNSIGNED;
+        Type = macho::RIT_X86_64_Unsigned;
     }
   }
 
@@ -331,13 +332,13 @@ void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
   FixedValue = Value;
 
   // struct relocation_info (8 bytes)
-  MachO::relocation_info MRE;
-  MRE.r_address = FixupOffset;
-  MRE.r_symbolnum = Index;
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_length = Log2Size;
-  MRE.r_extern = IsExtern;
-  MRE.r_type = Type;
+  macho::RelocationEntry MRE;
+  MRE.Word0 = FixupOffset;
+  MRE.Word1 = ((Index     <<  0) |
+               (IsPCRel   << 24) |
+               (Log2Size  << 25) |
+               (IsExtern  << 27) |
+               (Type      << 28));
   Writer->addRelocation(Fragment->getParent(), MRE);
 }
 
@@ -351,7 +352,7 @@ bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
                                                     uint64_t &FixedValue) {
   uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
   unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
-  unsigned Type = MachO::GENERIC_RELOC_VANILLA;
+  unsigned Type = macho::RIT_Vanilla;
 
   // See <reloc.h>.
   const MCSymbol *A = &Target.getSymA()->getSymbol();
@@ -378,16 +379,15 @@ bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
     // Note that there is no longer any semantic difference between these two
     // relocation types from the linkers point of view, this is done solely for
     // pedantic compatibility with 'as'.
-    Type = A_SD->isExternal() ? (unsigned)MachO::GENERIC_RELOC_SECTDIFF :
-      (unsigned)MachO::GENERIC_RELOC_LOCAL_SECTDIFF;
+    Type = A_SD->isExternal() ? (unsigned)macho::RIT_Difference :
+      (unsigned)macho::RIT_Generic_LocalDifference;
     Value2 = Writer->getSymbolAddress(B_SD, Layout);
     FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
   }
 
-  MachO::scattered_relocation_info MRE;
   // Relocations are written out in reverse order, so the PAIR comes first.
-  if (Type == MachO::GENERIC_RELOC_SECTDIFF ||
-      Type == MachO::GENERIC_RELOC_LOCAL_SECTDIFF) {
+  if (Type == macho::RIT_Difference ||
+      Type == macho::RIT_Generic_LocalDifference) {
     // If the offset is too large to fit in a scattered relocation,
     // we're hosed. It's an unfortunate limitation of the MachO format.
     if (FixupOffset > 0xffffff) {
@@ -401,12 +401,13 @@ bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
       llvm_unreachable("fatal error returned?!");
     }
 
-    MRE.r_address = 0;
-    MRE.r_type = MachO::GENERIC_RELOC_PAIR;
-    MRE.r_length = Log2Size;
-    MRE.r_pcrel = IsPCRel;
-    MRE.r_scattered = 1;
-    MRE.r_value = Value2;
+    macho::RelocationEntry MRE;
+    MRE.Word0 = ((0         <<  0) |
+                 (macho::RIT_Pair  << 24) |
+                 (Log2Size  << 28) |
+                 (IsPCRel   << 30) |
+                 macho::RF_Scattered);
+    MRE.Word1 = Value2;
     Writer->addRelocation(Fragment->getParent(), MRE);
   } else {
     // If the offset is more than 24-bits, it won't fit in a scattered
@@ -420,12 +421,13 @@ bool X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
       return false;
   }
 
-  MRE.r_address = FixupOffset;
-  MRE.r_type = Type;
-  MRE.r_length = Log2Size;
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_scattered = 1;
-  MRE.r_value = Value;
+  macho::RelocationEntry MRE;
+  MRE.Word0 = ((FixupOffset <<  0) |
+               (Type        << 24) |
+               (Log2Size    << 28) |
+               (IsPCRel     << 30) |
+               macho::RF_Scattered);
+  MRE.Word1 = Value;
   Writer->addRelocation(Fragment->getParent(), MRE);
   return true;
 }
@@ -467,13 +469,13 @@ void X86MachObjectWriter::RecordTLVPRelocation(MachObjectWriter *Writer,
   }
 
   // struct relocation_info (8 bytes)
-  MachO::relocation_info MRE;
-  MRE.r_address = Value;
-  MRE.r_symbolnum = Index;
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_length = Log2Size;
-  MRE.r_extern = 1;
-  MRE.r_type = MachO::GENERIC_RELOC_TLV;
+  macho::RelocationEntry MRE;
+  MRE.Word0 = Value;
+  MRE.Word1 = ((Index                  <<  0) |
+               (IsPCRel                << 24) |
+               (Log2Size               << 25) |
+               (1                      << 27) | // Extern
+               (macho::RIT_Generic_TLV << 28)); // Type
   Writer->addRelocation(Fragment->getParent(), MRE);
 }
 
@@ -533,7 +535,7 @@ void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
     //
     // FIXME: Currently, these are never generated (see code below). I cannot
     // find a case where they are actually emitted.
-    Type = MachO::GENERIC_RELOC_VANILLA;
+    Type = macho::RIT_Vanilla;
   } else {
     // Resolve constant variables.
     if (SD->getSymbol().isVariable()) {
@@ -564,17 +566,17 @@ void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
     if (IsPCRel)
       FixedValue -= Writer->getSectionAddress(Fragment->getParent());
 
-    Type = MachO::GENERIC_RELOC_VANILLA;
+    Type = macho::RIT_Vanilla;
   }
 
   // struct relocation_info (8 bytes)
-  MachO::relocation_info MRE;
-  MRE.r_address = FixupOffset;
-  MRE.r_symbolnum = Index;
-  MRE.r_pcrel = IsPCRel;
-  MRE.r_length = Log2Size;
-  MRE.r_extern = IsExtern;
-  MRE.r_type = Type;
+  macho::RelocationEntry MRE;
+  MRE.Word0 = FixupOffset;
+  MRE.Word1 = ((Index     <<  0) |
+               (IsPCRel   << 24) |
+               (Log2Size  << 25) |
+               (IsExtern  << 27) |
+               (Type      << 28));
   Writer->addRelocation(Fragment->getParent(), MRE);
 }