aboutsummaryrefslogtreecommitdiffstats
path: root/lib/Target
diff options
context:
space:
mode:
authorMisha Brukman <brukman+llvm@gmail.com>2002-10-28 00:28:31 +0000
committerMisha Brukman <brukman+llvm@gmail.com>2002-10-28 00:28:31 +0000
commitfce1143bcfa73f61845002fa50473d1a01384202 (patch)
treef8953fdcdd5a3ff127e9897746af825ff28eebc3 /lib/Target
parent6f8fd25697c2aec8c915c34f3c90ee52b77b8f56 (diff)
downloadexternal_llvm-fce1143bcfa73f61845002fa50473d1a01384202.zip
external_llvm-fce1143bcfa73f61845002fa50473d1a01384202.tar.gz
external_llvm-fce1143bcfa73f61845002fa50473d1a01384202.tar.bz2
Changed `MachineCodeForMethod' to `MachineFunction'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4301 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/MachineFrameInfo.cpp6
-rw-r--r--lib/Target/SparcV9/InstrSched/InstrScheduling.cpp4
-rw-r--r--lib/Target/SparcV9/InstrSched/SchedGraph.h4
-rw-r--r--lib/Target/SparcV9/InstrSelection/InstrSelection.cpp4
-rw-r--r--lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp2
-rw-r--r--lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp6
-rw-r--r--lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h4
-rw-r--r--lib/Target/SparcV9/SparcV9AsmPrinter.cpp4
-rw-r--r--lib/Target/SparcV9/SparcV9InstrInfo.cpp20
-rw-r--r--lib/Target/SparcV9/SparcV9InstrSelection.cpp6
-rw-r--r--lib/Target/SparcV9/SparcV9Internals.h14
-rw-r--r--lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp6
-rw-r--r--lib/Target/SparcV9/SparcV9RegInfo.cpp8
-rw-r--r--lib/Target/SparcV9/SparcV9StackSlots.cpp4
-rw-r--r--lib/Target/SparcV9/SparcV9TargetMachine.cpp10
-rw-r--r--lib/Target/TargetMachine.cpp6
16 files changed, 54 insertions, 54 deletions
diff --git a/lib/Target/MachineFrameInfo.cpp b/lib/Target/MachineFrameInfo.cpp
index 0eeacbc..4d2fab2 100644
--- a/lib/Target/MachineFrameInfo.cpp
+++ b/lib/Target/MachineFrameInfo.cpp
@@ -7,10 +7,10 @@
//===----------------------------------------------------------------------===//
#include "llvm/Target/MachineFrameInfo.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
int
-MachineFrameInfo::getIncomingArgOffset(MachineCodeForMethod& mcInfo,
+MachineFrameInfo::getIncomingArgOffset(MachineFunction& mcInfo,
unsigned argNum) const
{
assert(argsOnStackHaveFixedSize());
@@ -25,7 +25,7 @@ MachineFrameInfo::getIncomingArgOffset(MachineCodeForMethod& mcInfo,
int
-MachineFrameInfo::getOutgoingArgOffset(MachineCodeForMethod& mcInfo,
+MachineFrameInfo::getOutgoingArgOffset(MachineFunction& mcInfo,
unsigned argNum) const
{
assert(argsOnStackHaveFixedSize());
diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
index 9818b70..ea20a3e 100644
--- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
+++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
@@ -9,7 +9,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
@@ -1542,7 +1542,7 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F)
if (SchedDebugLevel >= Sched_PrintMachineCode)
{
cerr << "\n*** Machine instructions after INSTRUCTION SCHEDULING\n";
- MachineCodeForMethod::get(&F).dump();
+ MachineFunction::get(&F).dump();
}
return false;
diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.h b/lib/Target/SparcV9/InstrSched/SchedGraph.h
index eac9c1c..514e565 100644
--- a/lib/Target/SparcV9/InstrSched/SchedGraph.h
+++ b/lib/Target/SparcV9/InstrSched/SchedGraph.h
@@ -31,7 +31,7 @@ class RegToRefVecMap;
class ValueToDefVecMap;
class RefVec;
class MachineInstr;
-class MachineCodeForBasicBlock;
+class MachineBasicBlock;
/******************** Exported Data Types and Constants ********************/
@@ -312,7 +312,7 @@ private:
const TargetMachine& target);
void addCallCCEdges (const std::vector<SchedGraphNode*>& memNod,
- MachineCodeForBasicBlock& bbMvec,
+ MachineBasicBlock& bbMvec,
const TargetMachine& target);
void addMachineRegEdges (RegToRefVecMap& regToRefVecMap,
diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp
index a9d1331..83ce0a7 100644
--- a/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp
+++ b/lib/Target/SparcV9/InstrSelection/InstrSelection.cpp
@@ -12,7 +12,7 @@
#include "llvm/CodeGen/InstrForest.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Target/MachineRegInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Function.h"
@@ -155,7 +155,7 @@ bool InstructionSelection::runOnFunction(Function &F)
if (SelectDebugLevel >= Select_PrintMachineCode)
{
cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
- MachineCodeForMethod::get(&F).dump();
+ MachineFunction::get(&F).dump();
}
return true;
diff --git a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
index 731f335..b2f5b22 100644
--- a/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
+++ b/lib/Target/SparcV9/InstrSelection/InstrSelectionSupport.cpp
@@ -10,7 +10,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/InstrForest.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/MachineRegInfo.h"
diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index 5fc6a4d..9899dbc 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -10,7 +10,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Target/TargetMachine.h"
@@ -78,7 +78,7 @@ Pass *getRegisterAllocator(TargetMachine &T) {
PhyRegAlloc::PhyRegAlloc(Function *F, const TargetMachine& tm,
FunctionLiveVarInfo *Lvi, LoopInfo *LDC)
: TM(tm), Meth(F),
- mcInfo(MachineCodeForMethod::get(F)),
+ mcInfo(MachineFunction::get(F)),
LVI(Lvi), LRI(F, tm, RegClassList),
MRI(tm.getRegInfo()),
NumOfRegClasses(MRI.getNumOfRegClasses()),
@@ -1194,7 +1194,7 @@ void PhyRegAlloc::allocateRegisters()
if (DEBUG_RA) {
cerr << "\n**** Machine Code After Register Allocation:\n\n";
- MachineCodeForMethod::get(Meth).dump();
+ MachineFunction::get(Meth).dump();
}
}
diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
index da4d2fd..ca51713 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
@@ -35,7 +35,7 @@
#include <vector>
#include <map>
-class MachineCodeForMethod;
+class MachineFunction;
class MachineRegInfo;
class FunctionLiveVarInfo;
class MachineInstr;
@@ -71,7 +71,7 @@ class PhyRegAlloc: public NonCopyable {
std::vector<RegClass *> RegClassList; // vector of register classes
const TargetMachine &TM; // target machine
const Function *Meth; // name of the function we work on
- MachineCodeForMethod &mcInfo; // descriptor for method's native code
+ MachineFunction &mcInfo; // descriptor for method's native code
FunctionLiveVarInfo *const LVI; // LV information for this method
// (already computed for BBs)
LiveRangeInfo LRI; // LR info (will be computed)
diff --git a/lib/Target/SparcV9/SparcV9AsmPrinter.cpp b/lib/Target/SparcV9/SparcV9AsmPrinter.cpp
index ce81248..f414347 100644
--- a/lib/Target/SparcV9/SparcV9AsmPrinter.cpp
+++ b/lib/Target/SparcV9/SparcV9AsmPrinter.cpp
@@ -14,7 +14,7 @@
#include "SparcInternals.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
@@ -865,7 +865,7 @@ void SparcModuleAsmPrinter::FoldConstants(const Module &M,
for (Module::const_iterator I = M.begin(), E = M.end(); I != E; ++I)
if (!I->isExternal()) {
const hash_set<const Constant*> &pool =
- MachineCodeForMethod::get(I).getConstantPoolValues();
+ MachineFunction::get(I).getConstantPoolValues();
MC.insert(pool.begin(), pool.end());
}
}
diff --git a/lib/Target/SparcV9/SparcV9InstrInfo.cpp b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
index 662c80a..fbabe93 100644
--- a/lib/Target/SparcV9/SparcV9InstrInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrInfo.cpp
@@ -6,7 +6,7 @@
#include "SparcInstrSelectionSupport.h"
#include "llvm/CodeGen/InstrSelection.h"
#include "llvm/CodeGen/InstrSelectionSupport.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/Function.h"
#include "llvm/Constants.h"
@@ -361,7 +361,7 @@ UltraSparcInstrInfo::ConstantMayNotFitInImmedField(const Constant* CV,
// GlobalValue, viz., the constant address of a global variable or function.
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
@@ -461,7 +461,7 @@ UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
mvec.push_back(MI);
// Make sure constant is emitted to constant pool in assembly code.
- MachineCodeForMethod::get(F).addToConstantPool(cast<Constant>(val));
+ MachineFunction::get(F).addToConstantPool(cast<Constant>(val));
}
}
@@ -471,7 +471,7 @@ UltraSparcInstrInfo::CreateCodeToLoadConst(const TargetMachine& target,
// val must be an integral type. dest must be a Float or Double.
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
@@ -487,7 +487,7 @@ UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
&& "Dest type must be float/double");
// Get a stack slot to use for the copy
- int offset = MachineCodeForMethod::get(F).allocateLocalVar(target, val);
+ int offset = MachineFunction::get(F).allocateLocalVar(target, val);
// Get the size of the source value being copied.
size_t srcSize = target.DataLayout.getTypeSize(val->getType());
@@ -532,7 +532,7 @@ UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(const TargetMachine& target,
// `val' to an integer register `dest' by copying to memory and back.
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
@@ -549,7 +549,7 @@ UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
assert((destTy->isIntegral() || isa<PointerType>(destTy))
&& "Dest type must be integer, bool or pointer");
- int offset = MachineCodeForMethod::get(F).allocateLocalVar(target, val);
+ int offset = MachineFunction::get(F).allocateLocalVar(target, val);
// Store instruction stores `val' to [%fp+offset].
// The store opCode is based only the source value being copied.
@@ -579,7 +579,7 @@ UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(const TargetMachine& target,
// Create instruction(s) to copy src to dest, for arbitrary types
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateCopyInstructionsByType(const TargetMachine& target,
@@ -675,7 +675,7 @@ CreateBitExtensionInstructions(bool signExtend,
// from an arbitrary-sized integer value (sized in bits, not bytes).
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateSignExtensionInstructions(
@@ -697,7 +697,7 @@ UltraSparcInstrInfo::CreateSignExtensionInstructions(
// For SPARC v9, we sign-extend the given operand using SLL; SRL.
// The generated instructions are returned in `mvec'.
// Any temp. registers (TmpInstruction) created are recorded in mcfi.
-// Any stack space required is allocated via MachineCodeForMethod.
+// Any stack space required is allocated via MachineFunction.
//
void
UltraSparcInstrInfo::CreateZeroExtensionInstructions(
diff --git a/lib/Target/SparcV9/SparcV9InstrSelection.cpp b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
index 5195f4a..4a55df3 100644
--- a/lib/Target/SparcV9/SparcV9InstrSelection.cpp
+++ b/lib/Target/SparcV9/SparcV9InstrSelection.cpp
@@ -12,7 +12,7 @@
#include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/InstrForest.h"
#include "llvm/CodeGen/InstrSelection.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/DerivedTypes.h"
#include "llvm/iTerminators.h"
@@ -843,7 +843,7 @@ CreateCodeForVariableSizeAlloca(const TargetMachine& target,
// and create a temporary Value to hold it.
assert(result && result->getParent() && "Result value is not part of a fn?");
Function *F = result->getParent()->getParent();
- MachineCodeForMethod& mcInfo = MachineCodeForMethod::get(F);
+ MachineFunction& mcInfo = MachineFunction::get(F);
bool growUp;
ConstantSInt* dynamicAreaOffset =
ConstantSInt::get(Type::IntTy,
@@ -885,7 +885,7 @@ CreateCodeForFixedSizeAlloca(const TargetMachine& target,
assert(result && result->getParent() &&
"Result value is not part of a function?");
Function *F = result->getParent()->getParent();
- MachineCodeForMethod &mcInfo = MachineCodeForMethod::get(F);
+ MachineFunction &mcInfo = MachineFunction::get(F);
// Check if the offset would small enough to use as an immediate in
// load/stores (check LDX because all load/stores have the same-size immediate
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index 2399a1e..4304518 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -560,32 +560,32 @@ public:
// particular function. The frame contents are obtained from the
// MachineCodeInfoForMethod object for the given function.
//
- int getFirstIncomingArgOffset (MachineCodeForMethod& mcInfo,
+ int getFirstIncomingArgOffset (MachineFunction& mcInfo,
bool& growUp) const
{
growUp = true; // arguments area grows upwards
return FirstIncomingArgOffsetFromFP;
}
- int getFirstOutgoingArgOffset (MachineCodeForMethod& mcInfo,
+ int getFirstOutgoingArgOffset (MachineFunction& mcInfo,
bool& growUp) const
{
growUp = true; // arguments area grows upwards
return FirstOutgoingArgOffsetFromSP;
}
- int getFirstOptionalOutgoingArgOffset(MachineCodeForMethod& mcInfo,
+ int getFirstOptionalOutgoingArgOffset(MachineFunction& mcInfo,
bool& growUp)const
{
growUp = true; // arguments area grows upwards
return FirstOptionalOutgoingArgOffsetFromSP;
}
- int getFirstAutomaticVarOffset (MachineCodeForMethod& mcInfo,
+ int getFirstAutomaticVarOffset (MachineFunction& mcInfo,
bool& growUp) const;
- int getRegSpillAreaOffset (MachineCodeForMethod& mcInfo,
+ int getRegSpillAreaOffset (MachineFunction& mcInfo,
bool& growUp) const;
- int getTmpAreaOffset (MachineCodeForMethod& mcInfo,
+ int getTmpAreaOffset (MachineFunction& mcInfo,
bool& growUp) const;
- int getDynamicAreaOffset (MachineCodeForMethod& mcInfo,
+ int getDynamicAreaOffset (MachineFunction& mcInfo,
bool& growUp) const;
//
diff --git a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
index 75146c0..adb1490 100644
--- a/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
+++ b/lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp
@@ -11,7 +11,7 @@
#include "SparcInternals.h"
#include "SparcRegClassInfo.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineCodeForBasicBlock.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineInstr.h"
@@ -28,7 +28,7 @@ namespace {
const char *getPassName() const { return "Sparc Prolog/Epilog Inserter"; }
bool runOnFunction(Function &F) {
- MachineCodeForMethod &mcodeInfo = MachineCodeForMethod::get(&F);
+ MachineFunction &mcodeInfo = MachineFunction::get(&F);
if (!mcodeInfo.isCompiledAsLeafMethod()) {
InsertPrologCode(F);
InsertEpilogCode(F);
@@ -60,7 +60,7 @@ void InsertPrologEpilogCode::InsertPrologCode(Function &F)
// immediate field, we have to use a free register to hold the size.
// See the comments below for the choice of this register.
//
- MachineCodeForMethod& mcInfo = MachineCodeForMethod::get(&F);
+ MachineFunction& mcInfo = MachineFunction::get(&F);
unsigned int staticStackSize = mcInfo.getStaticStackSize();
if (staticStackSize < (unsigned) frameInfo.getMinStackFrameSize())
diff --git a/lib/Target/SparcV9/SparcV9RegInfo.cpp b/lib/Target/SparcV9/SparcV9RegInfo.cpp
index 65539cf..17c210f 100644
--- a/lib/Target/SparcV9/SparcV9RegInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegInfo.cpp
@@ -8,7 +8,7 @@
#include "SparcInternals.h"
#include "SparcRegClassInfo.h"
#include "llvm/Target/Sparc.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/PhyRegAlloc.h"
#include "llvm/CodeGen/InstrSelection.h"
#include "llvm/CodeGen/InstrSelectionSupport.h"
@@ -477,7 +477,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
regClassIDOfArgReg == IntRegClassID &&
"This should only be an Int register for an FP argument");
- int TmpOff = MachineCodeForMethod::get(Meth).pushTempValue(target,
+ int TmpOff = MachineFunction::get(Meth).pushTempValue(target,
getSpilledRegSize(regType));
cpReg2MemMI(FirstAI->InstrnsBefore,
UniArgReg, getFramePointer(), TmpOff, IntRegType);
@@ -496,7 +496,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
//
const MachineFrameInfo& frameInfo = target.getFrameInfo();
int offsetFromFP =
- frameInfo.getIncomingArgOffset(MachineCodeForMethod::get(Meth),
+ frameInfo.getIncomingArgOffset(MachineFunction::get(Meth),
argNo);
cpMem2RegMI(FirstAI->InstrnsBefore,
@@ -544,7 +544,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
const MachineFrameInfo& frameInfo = target.getFrameInfo();
int offsetFromFP =
- frameInfo.getIncomingArgOffset(MachineCodeForMethod::get(Meth),
+ frameInfo.getIncomingArgOffset(MachineFunction::get(Meth),
argNo);
LR->modifySpillOffFromFP( offsetFromFP );
diff --git a/lib/Target/SparcV9/SparcV9StackSlots.cpp b/lib/Target/SparcV9/SparcV9StackSlots.cpp
index c7584d2..10cccd3 100644
--- a/lib/Target/SparcV9/SparcV9StackSlots.cpp
+++ b/lib/Target/SparcV9/SparcV9StackSlots.cpp
@@ -13,7 +13,7 @@
#include "llvm/Function.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Pass.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
class StackSlots : public FunctionPass {
const TargetMachine &Target;
@@ -32,7 +32,7 @@ public:
const Type *PtrInt = PointerType::get(Type::IntTy);
unsigned Size = Target.DataLayout.getTypeSize(PtrInt);
- MachineCodeForMethod &mcInfo = MachineCodeForMethod::get(&F);
+ MachineFunction &mcInfo = MachineFunction::get(&F);
Value *V = Constant::getNullValue(Type::IntTy);
mcInfo.allocateLocalVar(Target, V, 2*Size);
return true;
diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index 88eaeb8..2484ace 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -8,7 +8,7 @@
#include "SparcInternals.h"
#include "llvm/Target/Sparc.h"
#include "llvm/Function.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
using std::cerr;
// Build the MachineInstruction Description Array...
@@ -39,7 +39,7 @@ TargetMachine *allocateSparcTargetMachine() { return new UltraSparc(); }
//---------------------------------------------------------------------------
int
-UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineCodeForMethod& ,
+UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
bool& pos) const
{
pos = false; // static stack area grows downwards
@@ -47,7 +47,7 @@ UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineCodeForMethod& ,
}
int
-UltraSparcFrameInfo::getRegSpillAreaOffset(MachineCodeForMethod& mcInfo,
+UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
bool& pos) const
{
mcInfo.freezeAutomaticVarsArea(); // ensure no more auto vars are added
@@ -58,7 +58,7 @@ UltraSparcFrameInfo::getRegSpillAreaOffset(MachineCodeForMethod& mcInfo,
}
int
-UltraSparcFrameInfo::getTmpAreaOffset(MachineCodeForMethod& mcInfo,
+UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
bool& pos) const
{
mcInfo.freezeAutomaticVarsArea(); // ensure no more auto vars are added
@@ -72,7 +72,7 @@ UltraSparcFrameInfo::getTmpAreaOffset(MachineCodeForMethod& mcInfo,
}
int
-UltraSparcFrameInfo::getDynamicAreaOffset(MachineCodeForMethod& mcInfo,
+UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
bool& pos) const
{
// Dynamic stack area grows downwards starting at top of opt-args area.
diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 5a0acfd..a61a804 100644
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -14,7 +14,7 @@
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/CodeGen/RegisterAllocation.h"
#include "llvm/CodeGen/PeepholeOpts.h"
-#include "llvm/CodeGen/MachineCodeForMethod.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/Reoptimizer/Mapping/MappingInfo.h"
#include "llvm/Reoptimizer/Mapping/FInfo.h"
@@ -87,7 +87,7 @@ public:
}
bool runOnFunction(Function &F) {
- MachineCodeForMethod::construct(&F, Target);
+ MachineFunction::construct(&F, Target);
return false;
}
};
@@ -117,7 +117,7 @@ struct FreeMachineCodeForFunction : public FunctionPass {
void
TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
{
- // Construct and initialize the MachineCodeForMethod object for this fn.
+ // Construct and initialize the MachineFunction object for this fn.
PM.add(new ConstructMachineCodeForFunction(*this));
//Insert empty stackslots in the stack frame of each function