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| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-24 03:11:18 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-12-24 03:11:18 +0000 |
| commit | fd1d9250b2b85ae4c6e7ae1a512bf6ea56af3c97 (patch) | |
| tree | a0e776d1f57f9caea0b4c649cef17889588583ec /lib/Target | |
| parent | 9dfd4399a957f4a1a0c0111f0134554891b98021 (diff) | |
| download | external_llvm-fd1d9250b2b85ae4c6e7ae1a512bf6ea56af3c97.zip external_llvm-fd1d9250b2b85ae4c6e7ae1a512bf6ea56af3c97.tar.gz external_llvm-fd1d9250b2b85ae4c6e7ae1a512bf6ea56af3c97.tar.bz2 | |
Add MachineMemOperands to instructions generated in storeRegToStackSlot or
loadRegFromStackSlot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147235 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index 711ad7c..5797112 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -168,6 +168,16 @@ copyPhysReg(MachineBasicBlock &MBB, MIB.addReg(SrcReg, getKillRegState(KillSrc)); } +static MachineMemOperand* GetMemOperand(MachineBasicBlock &MBB, int FI, + unsigned Flag) { + MachineFunction &MF = *MBB.getParent(); + MachineFrameInfo &MFI = *MF.getFrameInfo(); + unsigned Align = MFI.getObjectAlignment(FI); + + return MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI), Flag, + MFI.getObjectSize(FI), Align); +} + void MipsInstrInfo:: storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, @@ -175,6 +185,8 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const TargetRegisterInfo *TRI) const { DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); + MachineMemOperand *MMO = GetMemOperand(MBB, FI, MachineMemOperand::MOStore); + unsigned Opc = 0; if (RC == Mips::CPURegsRegisterClass) @@ -190,7 +202,7 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, assert(Opc && "Register class not handled!"); BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) - .addFrameIndex(FI).addImm(0); + .addFrameIndex(FI).addImm(0).addMemOperand(MMO); } void MipsInstrInfo:: @@ -201,6 +213,7 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, { DebugLoc DL; if (I != MBB.end()) DL = I->getDebugLoc(); + MachineMemOperand *MMO = GetMemOperand(MBB, FI, MachineMemOperand::MOLoad); unsigned Opc = 0; if (RC == Mips::CPURegsRegisterClass) @@ -215,7 +228,8 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Opc = IsN64 ? Mips::LDC164_P8 : Mips::LDC164; assert(Opc && "Register class not handled!"); - BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0); + BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(0) + .addMemOperand(MMO); } MachineInstr* |