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authorEvan Cheng <evan.cheng@apple.com>2007-07-19 01:14:50 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-07-19 01:14:50 +0000
commit64d80e3387f328d21cd9cc06464b5de7861e3f27 (patch)
tree203a9dfb41eba2fd8bd65a1e8bb80f73e36c0771 /lib/Transforms
parent4558b807a2076e199bcb019f5edc9eabbc5922c1 (diff)
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Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
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