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| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-10-14 21:57:19 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-10-14 21:57:19 +0000 |
| commit | 009d3f400cf0538be8369d17b76092817261585f (patch) | |
| tree | c6226aa433b7aa183fb7d436c9258150bf82fd04 /lib | |
| parent | 17187e936a37171260b81b838a411db128fb1690 (diff) | |
| download | external_llvm-009d3f400cf0538be8369d17b76092817261585f.zip external_llvm-009d3f400cf0538be8369d17b76092817261585f.tar.gz external_llvm-009d3f400cf0538be8369d17b76092817261585f.tar.bz2 | |
Generate the SparcV8 code emitter from .td files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17000 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Sparc/Makefile | 6 | ||||
| -rw-r--r-- | lib/Target/SparcV8/Makefile | 6 |
2 files changed, 10 insertions, 2 deletions
diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile index 31d379a..5528a35 100644 --- a/lib/Target/Sparc/Makefile +++ b/lib/Target/Sparc/Makefile @@ -16,7 +16,7 @@ TDFILE := $(SourceDir)/SparcV8.td # Make sure that tblgen is run, first thing. $(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \ SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \ - SparcV8GenInstrInfo.inc + SparcV8GenInstrInfo.inc SparcV8GenCodeEmitter.inc SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td register names with tblgen" @@ -38,5 +38,9 @@ SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td instruction information with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@ +SparcV8GenCodeEmitter.inc:: $(TDFILES) $(TBLGEN) + @echo "Building SparcV8.td code emitter with tblgen" + $(VERB) $(TBLGEN) -I $(SourceDir) $(TDFILE) -gen-emitter -o $@ + clean:: $(VERB) rm -f *.inc diff --git a/lib/Target/SparcV8/Makefile b/lib/Target/SparcV8/Makefile index 31d379a..5528a35 100644 --- a/lib/Target/SparcV8/Makefile +++ b/lib/Target/SparcV8/Makefile @@ -16,7 +16,7 @@ TDFILE := $(SourceDir)/SparcV8.td # Make sure that tblgen is run, first thing. $(SourceDepend): SparcV8GenRegisterInfo.h.inc SparcV8GenRegisterNames.inc \ SparcV8GenRegisterInfo.inc SparcV8GenInstrNames.inc \ - SparcV8GenInstrInfo.inc + SparcV8GenInstrInfo.inc SparcV8GenCodeEmitter.inc SparcV8GenRegisterNames.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td register names with tblgen" @@ -38,5 +38,9 @@ SparcV8GenInstrInfo.inc:: $(TDFILES) $(TBLGEN) @echo "Building SparcV8.td instruction information with tblgen" $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $(TDFILE) -gen-instr-desc -o $@ +SparcV8GenCodeEmitter.inc:: $(TDFILES) $(TBLGEN) + @echo "Building SparcV8.td code emitter with tblgen" + $(VERB) $(TBLGEN) -I $(SourceDir) $(TDFILE) -gen-emitter -o $@ + clean:: $(VERB) rm -f *.inc |