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author | Evan Cheng <evan.cheng@apple.com> | 2011-03-09 23:53:17 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-03-09 23:53:17 +0000 |
commit | 02d7c9298298f7f8fba1427f249deb2106126e9c (patch) | |
tree | 94acfbf624e66c2973b4d28cc9a06889f8b2d9b4 /lib | |
parent | 0f24d49acae52fc66f72136bbe4891a9a8c9cd36 (diff) | |
download | external_llvm-02d7c9298298f7f8fba1427f249deb2106126e9c.zip external_llvm-02d7c9298298f7f8fba1427f249deb2106126e9c.tar.gz external_llvm-02d7c9298298f7f8fba1427f249deb2106126e9c.tar.bz2 |
Revert 127368 and 127371 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127376 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 17 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 16 | ||||
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 2 |
3 files changed, 11 insertions, 24 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp index 7b560d1..e3da208 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp @@ -570,20 +570,13 @@ void ScheduleDAGFast::ListScheduleBottomUp() { TRI->getMinimalPhysRegClass(Reg, VT); const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); - // If cross copy register class is the same as RC, then it must be - // possible copy the value directly. Do not try duplicate the def. - // If cross copy register class is not the same as RC, then it's - // possible to copy the value but it require cross register class copies - // and it is expensive. - // If cross copy register class is null, then it's not possible to copy - // the value at all. + // If cross copy register class is null, then it must be possible copy + // the value directly. Do not try duplicate the def. SUnit *NewDef = 0; - if (DestRC != RC) { + if (DestRC) NewDef = CopyAndMoveSuccessors(LRDef); - if (!DestRC && !NewDef) - report_fatal_error("Can't handle live physical " - "register dependency!"); - } + else + DestRC = RC; if (!NewDef) { // Issue copies, these can be expensive cross register class copies. SmallVector<SUnit*, 2> Copies; diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index 5e60aa0..f1a5a65 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -1140,19 +1140,13 @@ SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() { TRI->getMinimalPhysRegClass(Reg, VT); const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC); - // If cross copy register class is the same as RC, then it must be possible - // copy the value directly. Do not try duplicate the def. - // If cross copy register class is not the same as RC, then it's possible to - // copy the value but it require cross register class copies and it is - // expensive. - // If cross copy register class is null, then it's not possible to copy - // the value at all. + // If cross copy register class is null, then it must be possible copy + // the value directly. Do not try duplicate the def. SUnit *NewDef = 0; - if (DestRC != RC) { + if (DestRC) NewDef = CopyAndMoveSuccessors(LRDef); - if (!DestRC && !NewDef) - report_fatal_error("Can't handle live physical register dependency!"); - } + else + DestRC = RC; if (!NewDef) { // Issue copies, these can be expensive cross register class copies. SmallVector<SUnit*, 2> Copies; diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 1f464f4..fe98cac 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -337,7 +337,7 @@ X86RegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const { else return &X86::GR32RegClass; } - return RC; + return NULL; } unsigned |