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author | Chris Lattner <sabre@nondot.org> | 2010-02-12 02:06:33 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-02-12 02:06:33 +0000 |
commit | 0d8db8e0a8492ab2d4bef725ec61b519471b97ec (patch) | |
tree | 9d2c9fbec8146b59e567d1eb2d77388f611911d3 /lib | |
parent | e79562dce009b2815d4378378394f18476fd4761 (diff) | |
download | external_llvm-0d8db8e0a8492ab2d4bef725ec61b519471b97ec.zip external_llvm-0d8db8e0a8492ab2d4bef725ec61b519471b97ec.tar.gz external_llvm-0d8db8e0a8492ab2d4bef725ec61b519471b97ec.tar.bz2 |
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95960 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/X86CodeEmitter.cpp | 21 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrFormats.td | 5 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 7 | ||||
-rw-r--r-- | lib/Target/X86/X86MCCodeEmitter.cpp | 20 |
5 files changed, 61 insertions, 0 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 6d5fa8d..02fa8ac 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -858,6 +858,27 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI, getX86RegNum(MI.getOperand(CurOp).getReg())); ++CurOp; break; + + case X86II::MRM_C1: + MCE.emitByte(BaseOpcode); + MCE.emitByte(0xC1); + break; + case X86II::MRM_C8: + MCE.emitByte(BaseOpcode); + MCE.emitByte(0xC8); + break; + case X86II::MRM_C9: + MCE.emitByte(BaseOpcode); + MCE.emitByte(0xC9); + break; + case X86II::MRM_E8: + MCE.emitByte(BaseOpcode); + MCE.emitByte(0xE8); + break; + case X86II::MRM_F0: + MCE.emitByte(BaseOpcode); + MCE.emitByte(0xF0); + break; } if (!Desc->isVariadic() && CurOp != NumOps) { diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index a799f16..7e3c2b2 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -29,6 +29,11 @@ def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>; def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>; def MRM6m : Format<30>; def MRM7m : Format<31>; def MRMInitReg : Format<32>; +def MRM_C1 : Format<33>; +def MRM_C8 : Format<34>; +def MRM_C9 : Format<35>; +def MRM_E8 : Format<36>; +def MRM_F0 : Format<37>; // ImmType - This specifies the immediate type used by an instruction. This is diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 069d353..a0d0312 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -3556,6 +3556,14 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, } } break; + + case X86II::MRM_C1: + case X86II::MRM_C8: + case X86II::MRM_C9: + case X86II::MRM_E8: + case X86II::MRM_F0: + FinalSize += 2; + break; } case X86II::MRMInitReg: diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index a6b3863..8c6b617 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -268,6 +268,13 @@ namespace X86II { // MRMInitReg - This form is used for instructions whose source and // destinations are the same register. MRMInitReg = 32, + + //// MRM_C1 - A mod/rm byte of exactly 0xC1. + MRM_C1 = 33, + MRM_C8 = 34, + MRM_C9 = 35, + MRM_E8 = 36, + MRM_F0 = 37, FormMask = 63, diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp index 898592e..b573cc2 100644 --- a/lib/Target/X86/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/X86MCCodeEmitter.cpp @@ -560,6 +560,26 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, CurByte, OS, Fixups); CurOp += X86AddrNumOperands; break; + case X86II::MRM_C1: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xC1, CurByte, OS); + break; + case X86II::MRM_C8: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xC8, CurByte, OS); + break; + case X86II::MRM_C9: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xC9, CurByte, OS); + break; + case X86II::MRM_E8: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xE8, CurByte, OS); + break; + case X86II::MRM_F0: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xF0, CurByte, OS); + break; } // If there is a remaining operand, it must be a trailing immediate. Emit it |