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| author | Zhou Sheng <zhousheng00@gmail.com> | 2008-06-05 14:23:44 +0000 |
|---|---|---|
| committer | Zhou Sheng <zhousheng00@gmail.com> | 2008-06-05 14:23:44 +0000 |
| commit | 17183ab9737ef0e9933486b8138ab6d1e7efb1f7 (patch) | |
| tree | dd101b63fc5c15ff5a744e88ad48d5c8633c7c6f /lib | |
| parent | 411e6a5efb438cad2a455f462e2611529ffab3f2 (diff) | |
| download | external_llvm-17183ab9737ef0e9933486b8138ab6d1e7efb1f7.zip external_llvm-17183ab9737ef0e9933486b8138ab6d1e7efb1f7.tar.gz external_llvm-17183ab9737ef0e9933486b8138ab6d1e7efb1f7.tar.bz2 | |
If BitWidth equals to ShtAmt, the RHSKnownZero[BitWidth-ShiftAmt-1] will
crash the opt. Just fix this.
Test case in llvm/test/Transforms/InstCombine/2008-06-05-ashr-crash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52003 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Transforms/Scalar/InstructionCombining.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index 516841a..05e1269 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -1236,7 +1236,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask, // If the input sign bit is known to be zero, or if none of the top bits // are demanded, turn this into an unsigned shift right. - if (RHSKnownZero[BitWidth-ShiftAmt-1] || + if (BitWidth == ShiftAmt || RHSKnownZero[BitWidth-ShiftAmt-1] || (HighBits & ~DemandedMask) == HighBits) { // Perform the logical shift right. Value *NewVal = BinaryOperator::CreateLShr( |