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author | Daniel Dunbar <daniel@zuster.org> | 2009-07-24 10:36:58 +0000 |
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committer | Daniel Dunbar <daniel@zuster.org> | 2009-07-24 10:36:58 +0000 |
commit | 1cd1d98232c3c3a0bd3810c3bf6c2572ea02f208 (patch) | |
tree | 233ac1c2bca5a7f2a8eb43b1a2815d807d9e4f9f /lib | |
parent | b95c2fd2700a92a7b857ebd1ecf6c7d561d676d2 (diff) | |
download | external_llvm-1cd1d98232c3c3a0bd3810c3bf6c2572ea02f208.zip external_llvm-1cd1d98232c3c3a0bd3810c3bf6c2572ea02f208.tar.gz external_llvm-1cd1d98232c3c3a0bd3810c3bf6c2572ea02f208.tar.bz2 |
Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76965 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/LiveInterval.cpp | 13 | ||||
-rw-r--r-- | lib/CodeGen/MachineBasicBlock.cpp | 12 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 8 | ||||
-rw-r--r-- | lib/CodeGen/VirtRegMap.cpp | 6 | ||||
-rw-r--r-- | lib/CodeGen/VirtRegMap.h | 11 | ||||
-rw-r--r-- | lib/Transforms/Utils/LowerSwitch.cpp | 9 |
6 files changed, 51 insertions, 8 deletions
diff --git a/lib/CodeGen/LiveInterval.cpp b/lib/CodeGen/LiveInterval.cpp index c8d3d43..78bde39 100644 --- a/lib/CodeGen/LiveInterval.cpp +++ b/lib/CodeGen/LiveInterval.cpp @@ -24,6 +24,7 @@ #include "llvm/ADT/SmallSet.h" #include "llvm/ADT/STLExtras.h" #include "llvm/Support/Streams.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetRegisterInfo.h" #include <algorithm> #include <ostream> @@ -819,6 +820,9 @@ void LiveInterval::ComputeJoinedWeight(const LiveInterval &Other) { std::ostream& llvm::operator<<(std::ostream& os, const LiveRange &LR) { return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")"; } +raw_ostream& llvm::operator<<(raw_ostream& os, const LiveRange &LR) { + return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")"; +} void LiveRange::dump() const { cerr << *this << "\n"; @@ -826,6 +830,12 @@ void LiveRange::dump() const { void LiveInterval::print(std::ostream &OS, const TargetRegisterInfo *TRI) const { + raw_os_ostream RawOS(OS); + print(RawOS, TRI); +} + +void LiveInterval::print(raw_ostream &OS, + const TargetRegisterInfo *TRI) const { if (isStackSlot()) OS << "SS#" << getStackSlotIndex(); else if (TRI && TargetRegisterInfo::isPhysicalRegister(reg)) @@ -890,3 +900,6 @@ void LiveInterval::dump() const { void LiveRange::print(std::ostream &os) const { os << *this; } +void LiveRange::print(raw_ostream &os) const { + os << *this; +} diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index 71e6b3e..80ca872 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -19,6 +19,7 @@ #include "llvm/Target/TargetInstrDesc.h" #include "llvm/Target/TargetMachine.h" #include "llvm/Support/LeakDetector.h" +#include "llvm/Support/raw_ostream.h" #include <algorithm> using namespace llvm; @@ -35,6 +36,10 @@ std::ostream& llvm::operator<<(std::ostream &OS, const MachineBasicBlock &MBB) { MBB.print(OS); return OS; } +raw_ostream& llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) { + MBB.print(OS); + return OS; +} /// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the /// parent pointer of the MBB, the MBB numbering, and any instructions in the @@ -137,7 +142,7 @@ void MachineBasicBlock::dump() const { print(*cerr.stream()); } -static inline void OutputReg(std::ostream &os, unsigned RegNo, +static inline void OutputReg(raw_ostream &os, unsigned RegNo, const TargetRegisterInfo *TRI = 0) { if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) { if (TRI) @@ -149,6 +154,11 @@ static inline void OutputReg(std::ostream &os, unsigned RegNo, } void MachineBasicBlock::print(std::ostream &OS) const { + raw_os_ostream RawOS(OS); + print(RawOS); +} + +void MachineBasicBlock::print(raw_ostream &OS) const { const MachineFunction *MF = getParent(); if(!MF) { OS << "Can't print out MachineBasicBlock because parent MachineFunction" diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index 7aa15bc..4e8e972 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -276,19 +276,19 @@ unsigned ScheduleDAGSDNodes::ComputeMemOperandsEnd(SDNode *Node) { void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const { if (!SU->getNode()) { - cerr << "PHYS REG COPY\n"; + errs() << "PHYS REG COPY\n"; return; } SU->getNode()->dump(DAG); - cerr << "\n"; + errs() << "\n"; SmallVector<SDNode *, 4> FlaggedNodes; for (SDNode *N = SU->getNode()->getFlaggedNode(); N; N = N->getFlaggedNode()) FlaggedNodes.push_back(N); while (!FlaggedNodes.empty()) { - cerr << " "; + errs() << " "; FlaggedNodes.back()->dump(DAG); - cerr << "\n"; + errs() << "\n"; FlaggedNodes.pop_back(); } } diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index 4d3417f..7ee4eeb 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -30,6 +30,7 @@ #include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/DepthFirstIterator.h" @@ -259,6 +260,11 @@ bool VirtRegMap::FindUnusedRegisters(LiveIntervals* LIs) { } void VirtRegMap::print(std::ostream &OS, const Module* M) const { + raw_os_ostream RawOS(OS); + print(RawOS, M); +} + +void VirtRegMap::print(raw_ostream &OS, const Module* M) const { const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo(); OS << "********** REGISTER MAP **********\n"; diff --git a/lib/CodeGen/VirtRegMap.h b/lib/CodeGen/VirtRegMap.h index fe767b7..7d1cf95 100644 --- a/lib/CodeGen/VirtRegMap.h +++ b/lib/CodeGen/VirtRegMap.h @@ -34,6 +34,7 @@ namespace llvm { class MachineRegisterInfo; class TargetInstrInfo; class TargetRegisterInfo; + class raw_ostream; class VirtRegMap : public MachineFunctionPass { public: @@ -483,6 +484,8 @@ namespace llvm { void print(std::ostream &OS, const Module* M = 0) const; void print(std::ostream *OS) const { if (OS) print(*OS); } + void print(raw_ostream &OS, const Module* M = 0) const; + void print(raw_ostream *OS) const { if (OS) print(*OS); } void dump() const; }; @@ -494,6 +497,14 @@ namespace llvm { VRM.print(OS); return OS; } + inline raw_ostream *operator<<(raw_ostream *OS, const VirtRegMap &VRM) { + VRM.print(OS); + return OS; + } + inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) { + VRM.print(OS); + return OS; + } } // End llvm namespace #endif diff --git a/lib/Transforms/Utils/LowerSwitch.cpp b/lib/Transforms/Utils/LowerSwitch.cpp index b412147..70db29e 100644 --- a/lib/Transforms/Utils/LowerSwitch.cpp +++ b/lib/Transforms/Utils/LowerSwitch.cpp @@ -109,8 +109,8 @@ bool LowerSwitch::runOnFunction(Function &F) { // operator<< - Used for debugging purposes. // -static std::ostream& operator<<(std::ostream &O, - const LowerSwitch::CaseVector &C) { +static raw_ostream& operator<<(raw_ostream &O, + const LowerSwitch::CaseVector &C) { O << "["; for (LowerSwitch::CaseVector::const_iterator B = C.begin(), @@ -123,7 +123,10 @@ static std::ostream& operator<<(std::ostream &O, } static OStream& operator<<(OStream &O, const LowerSwitch::CaseVector &C) { - if (O.stream()) *O.stream() << C; + if (O.stream()) { + raw_os_ostream OS(*O.stream()); + OS << C; + } return O; } |