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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2007-03-06 08:12:33 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2007-03-06 08:12:33 +0000 |
| commit | 1d9baccc9b4d664a944f82eef9f708125e3f1552 (patch) | |
| tree | 351a0e406db0b5601a2d9c421dd0ec3e9c1fa8c1 /lib | |
| parent | 3c2319e245f2fa9282f347d5582e61218e102d60 (diff) | |
| download | external_llvm-1d9baccc9b4d664a944f82eef9f708125e3f1552.zip external_llvm-1d9baccc9b4d664a944f82eef9f708125e3f1552.tar.gz external_llvm-1d9baccc9b4d664a944f82eef9f708125e3f1552.tar.bz2 | |
Use new SDIselParamAttr enumeration. This removes "magick" constants
from formal attributes' flags processing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34963 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/TargetCallingConv.td | 2 | ||||
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 11 |
3 files changed, 11 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index f573198..88c6ad0 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -27,6 +27,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Target/TargetOptions.h" #include "llvm/ADT/VectorExtras.h" @@ -346,7 +347,7 @@ HowToPassArgument(MVT::ValueType ObjectVT, unsigned NumGPRs, NeededGPRs = 0; StackPad = 0; GPRPad = 0; - unsigned align = (Flags >> 27); + unsigned align = (Flags >> SDISelParamFlags::OrigAlignmentOffs); GPRPad = NumGPRs % ((align + 3)/4); StackPad = StackOffset % align; unsigned firstGPR = NumGPRs + GPRPad; diff --git a/lib/Target/TargetCallingConv.td b/lib/Target/TargetCallingConv.td index edcd6dd..3f71a1d 100644 --- a/lib/Target/TargetCallingConv.td +++ b/lib/Target/TargetCallingConv.td @@ -38,7 +38,7 @@ class CCIfCC<string CC, CCAction A> /// CCIfInReg - If this argument is marked with the 'inreg' attribute, apply /// the specified action. -class CCIfInReg<CCAction A> : CCIf<"ArgFlags & 2", A> {} +class CCIfInReg<CCAction A> : CCIf<"ArgFlags & SDISelParamFlags::InReg", A> {} /// CCAssignToReg - This action matches if there is a register in the specified diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index c0c7b79..5502cdc 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -29,6 +29,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/CodeGen/SSARegMap.h" #include "llvm/Support/MathExtras.h" #include "llvm/Target/TargetOptions.h" @@ -665,10 +666,12 @@ SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG, BytesToPopOnReturn = StackSize; // Callee pops everything.. BytesCallerReserves = 0; } else { - BytesToPopOnReturn = 0; // Callee pops hidden struct pointer. + BytesToPopOnReturn = 0; // Callee pops nothing. // If this is an sret function, the return should pop the hidden pointer. - if (NumArgs && (cast<ConstantSDNode>(Op.getOperand(3))->getValue() & 4)) + if (NumArgs && + (cast<ConstantSDNode>(Op.getOperand(3))->getValue() & + SDISelParamFlags::StructReturn)) BytesToPopOnReturn = 4; BytesCallerReserves = StackSize; @@ -740,7 +743,9 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, } // If the first argument is an sret pointer, remember it. - bool isSRet = NumOps &&(cast<ConstantSDNode>(Op.getOperand(6))->getValue()&4); + bool isSRet = NumOps && + (cast<ConstantSDNode>(Op.getOperand(6))->getValue() & + SDISelParamFlags::StructReturn); if (!MemOpChains.empty()) Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |