Fix PR3391 and PR3864. Reg allocator infinite looping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67544 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 14 insertions, 6 deletions

diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index b5c2195..cd6f81c 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -2214,8 +2214,9 @@ unsigned LiveIntervals::getNumConflictsWithPhysReg(const LiveInterval &li,
 }
 
 /// spillPhysRegAroundRegDefsUses - Spill the specified physical register
-/// around all defs and uses of the specified interval.
-void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
+/// around all defs and uses of the specified interval. Return true if it
+/// was able to cut its interval.
+bool LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
                                             unsigned PhysReg, VirtRegMap &vrm) {
   unsigned SpillReg = getRepresentativeReg(PhysReg);
 
@@ -2226,6 +2227,7 @@ void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
     assert(*AS == SpillReg || !allocatableRegs_[*AS] ||
            tri_->isSuperRegister(*AS, SpillReg));
 
+  bool Cut = false;
   LiveInterval &pli = getInterval(SpillReg);
   SmallPtrSet<MachineInstr*, 8> SeenMIs;
   for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(li.reg),
@@ -2240,9 +2242,10 @@ void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
       vrm.addEmergencySpill(SpillReg, MI);
       unsigned StartIdx = getLoadIndex(Index);
       unsigned EndIdx = getStoreIndex(Index)+1;
-      if (pli.isInOneLiveRange(StartIdx, EndIdx))
+      if (pli.isInOneLiveRange(StartIdx, EndIdx)) {
         pli.removeRange(StartIdx, EndIdx);
-      else {
+        Cut = true;
+      } else {
         cerr << "Ran out of registers during register allocation!\n";
         if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {
           cerr << "Please check your inline asm statement for invalid "
@@ -2260,6 +2263,7 @@ void LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
       }
     }
   }
+  return Cut;
 }
 
 LiveRange LiveIntervals::addLiveRangeToEndOfBlock(unsigned reg,
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index e8296a7..912135a 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -869,8 +869,12 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
     if (cur->weight == HUGE_VALF ||
         li_->getApproximateInstructionCount(*cur) == 0) {
       // Spill a physical register around defs and uses.
-      li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_);
-      assignRegOrStackSlotAtInterval(cur);
+      if (li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_))
+        assignRegOrStackSlotAtInterval(cur);
+      else {
+        cerr << "Ran out of registers during register allocation!\n";
+        exit(1);
+      }
       return;
     }
   }