Increase ISD::ParamFlags to 64 bits. Increase the ByValSize

field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 52 insertions, 33 deletions

diff --git a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
index 591e9aa..6b9b31b 100644
--- a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
+++ b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
@@ -35,7 +35,7 @@ CCState::CCState(unsigned CC, bool isVarArg, const TargetMachine &tm,
 void CCState::HandleByVal(unsigned ValNo, MVT::ValueType ValVT,
                           MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo,
                           int MinSize, int MinAlign,
-                          unsigned ArgFlags) {
+                          ISD::ParamFlags::ParamFlagsTy ArgFlags) {
   unsigned Align  = 1 << ((ArgFlags & ISD::ParamFlags::ByValAlign) >>
                           ISD::ParamFlags::ByValAlignOffs);
   unsigned Size   = (ArgFlags & ISD::ParamFlags::ByValSize) >>
@@ -66,7 +66,8 @@ void CCState::AnalyzeFormalArguments(SDNode *TheArgs, CCAssignFn Fn) {
   for (unsigned i = 0; i != NumArgs; ++i) {
     MVT::ValueType ArgVT = TheArgs->getValueType(i);
     SDOperand FlagOp = TheArgs->getOperand(3+i);
-    unsigned ArgFlags = cast<ConstantSDNode>(FlagOp)->getValue();
+    ISD::ParamFlags::ParamFlagsTy ArgFlags = 
+              cast<ConstantSDNode>(FlagOp)->getValue();
     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
       cerr << "Formal argument #" << i << " has unhandled type "
            << MVT::getValueTypeString(ArgVT) << "\n";
@@ -98,7 +99,8 @@ void CCState::AnalyzeCallOperands(SDNode *TheCall, CCAssignFn Fn) {
   for (unsigned i = 0; i != NumOps; ++i) {
     MVT::ValueType ArgVT = TheCall->getOperand(5+2*i).getValueType();
     SDOperand FlagOp = TheCall->getOperand(5+2*i+1);
-    unsigned ArgFlags =cast<ConstantSDNode>(FlagOp)->getValue();
+    ISD::ParamFlags::ParamFlagsTy ArgFlags =
+                cast<ConstantSDNode>(FlagOp)->getValue();
     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
       cerr << "Call operand #" << i << " has unhandled type "
            << MVT::getValueTypeString(ArgVT) << "\n";
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index a0d18f8..85fbb6f 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -4059,7 +4059,7 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
   for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end();
        I != E; ++I, ++j) {
     MVT::ValueType VT = getValueType(I->getType());
-    unsigned Flags = ISD::ParamFlags::NoFlagSet;
+    ISD::ParamFlags::ParamFlagsTy Flags = ISD::ParamFlags::NoFlagSet;
     unsigned OriginalAlignment =
       getTargetData()->getABITypeAlignment(I->getType());
 
@@ -4083,12 +4083,15 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
       // this info is not there but there are cases it cannot get right.
       if (F.getParamAlignment(j))
         FrameAlign = Log2_32(F.getParamAlignment(j));
-      Flags |= (FrameAlign << ISD::ParamFlags::ByValAlignOffs);
-      Flags |= (FrameSize  << ISD::ParamFlags::ByValSizeOffs);
+      Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameAlign
+                   << ISD::ParamFlags::ByValAlignOffs);
+      Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameSize  
+                    << ISD::ParamFlags::ByValSizeOffs);
     }
     if (F.paramHasAttr(j, ParamAttr::Nest))
       Flags |= ISD::ParamFlags::Nest;
-    Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs);
+    Flags |= ((ISD::ParamFlags::ParamFlagsTy)OriginalAlignment 
+                  << ISD::ParamFlags::OrigAlignmentOffs);
 
     MVT::ValueType RegisterVT = getRegisterType(VT);
     unsigned NumRegs = getNumRegisters(VT);
@@ -4097,8 +4100,8 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
       // if it isn't first piece, alignment must be 1
       if (i > 0)
         Flags = (Flags & (~ISD::ParamFlags::OrigAlignment)) |
-          (1 << ISD::ParamFlags::OrigAlignmentOffs);
-      Ops.push_back(DAG.getConstant(Flags, MVT::i32));
+          (ISD::ParamFlags::One << ISD::ParamFlags::OrigAlignmentOffs);
+      Ops.push_back(DAG.getConstant(Flags, MVT::i64));
     }
   }
 
@@ -4174,7 +4177,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
   for (unsigned i = 0, e = Args.size(); i != e; ++i) {
     MVT::ValueType VT = getValueType(Args[i].Ty);
     SDOperand Op = Args[i].Node;
-    unsigned Flags = ISD::ParamFlags::NoFlagSet;
+    ISD::ParamFlags::ParamFlagsTy Flags = ISD::ParamFlags::NoFlagSet;
     unsigned OriginalAlignment =
       getTargetData()->getABITypeAlignment(Args[i].Ty);
     
@@ -4196,12 +4199,15 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
       // info is not there but there are cases it cannot get right.
       if (Args[i].Alignment)
         FrameAlign = Log2_32(Args[i].Alignment);
-      Flags |= (FrameAlign << ISD::ParamFlags::ByValAlignOffs);
-      Flags |= (FrameSize  << ISD::ParamFlags::ByValSizeOffs);
+      Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameAlign 
+                      << ISD::ParamFlags::ByValAlignOffs);
+      Flags |= ((ISD::ParamFlags::ParamFlagsTy)FrameSize  
+                      << ISD::ParamFlags::ByValSizeOffs);
     }
     if (Args[i].isNest)
       Flags |= ISD::ParamFlags::Nest;
-    Flags |= OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs;
+    Flags |= ((ISD::ParamFlags::ParamFlagsTy)OriginalAlignment) 
+                    << ISD::ParamFlags::OrigAlignmentOffs;
 
     MVT::ValueType PartVT = getRegisterType(VT);
     unsigned NumParts = getNumRegisters(VT);
@@ -4217,13 +4223,13 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
 
     for (unsigned i = 0; i != NumParts; ++i) {
       // if it isn't first piece, alignment must be 1
-      unsigned MyFlags = Flags;
+      ISD::ParamFlags::ParamFlagsTy MyFlags = Flags;
       if (i != 0)
         MyFlags = (MyFlags & (~ISD::ParamFlags::OrigAlignment)) |
-          (1 << ISD::ParamFlags::OrigAlignmentOffs);
+          (ISD::ParamFlags::One << ISD::ParamFlags::OrigAlignmentOffs);
 
       Ops.push_back(Parts[i]);
-      Ops.push_back(DAG.getConstant(MyFlags, MVT::i32));
+      Ops.push_back(DAG.getConstant(MyFlags, MVT::i64));
     }
   }
   
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 2e7d985..67aeebf 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -368,12 +368,13 @@ static void
 HowToPassArgument(MVT::ValueType ObjectVT, unsigned NumGPRs,
                   unsigned StackOffset, unsigned &NeededGPRs,
                   unsigned &NeededStackSize, unsigned &GPRPad,
-                  unsigned &StackPad, unsigned Flags) {
+                  unsigned &StackPad, ISD::ParamFlags::ParamFlagsTy Flags) {
   NeededStackSize = 0;
   NeededGPRs = 0;
   StackPad = 0;
   GPRPad = 0;
-  unsigned align = (Flags >> ISD::ParamFlags::OrigAlignmentOffs);
+  unsigned align = ((Flags & ISD::ParamFlags::OrigAlignment) 
+                        >> ISD::ParamFlags::OrigAlignmentOffs);
   GPRPad = NumGPRs % ((align + 3)/4);
   StackPad = StackOffset % align;
   unsigned firstGPR = NumGPRs + GPRPad;
@@ -422,7 +423,7 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
     unsigned StackPad;
     unsigned GPRPad;
     MVT::ValueType ObjectVT = Op.getOperand(5+2*i).getValueType();
-    unsigned Flags = Op.getConstantOperandVal(5+2*i+1);
+    ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(5+2*i+1);
     HowToPassArgument(ObjectVT, NumGPRs, NumBytes, ObjGPRs, ObjSize,
                       GPRPad, StackPad, Flags);
     NumBytes += ObjSize + StackPad;
@@ -445,7 +446,7 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
   std::vector<SDOperand> MemOpChains;
   for (unsigned i = 0; i != NumOps; ++i) {
     SDOperand Arg = Op.getOperand(5+2*i);
-    unsigned Flags = Op.getConstantOperandVal(5+2*i+1);
+    ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(5+2*i+1);
     MVT::ValueType ArgVT = Arg.getValueType();
 
     unsigned ObjSize;
@@ -924,7 +925,7 @@ static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG,
   unsigned ObjGPRs;
   unsigned GPRPad;
   unsigned StackPad;
-  unsigned Flags = Op.getConstantOperandVal(ArgNo + 3);
+  ISD::ParamFlags::ParamFlagsTy Flags = Op.getConstantOperandVal(ArgNo + 3);
   HowToPassArgument(ObjectVT, NumGPRs, ArgOffset, ObjGPRs,
                     ObjSize, GPRPad, StackPad, Flags);
   NumGPRs += GPRPad;
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 6b6ec55..ea7f25b 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1361,8 +1361,10 @@ PPCTargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op,
     MVT::ValueType ObjectVT = Op.getValue(ArgNo).getValueType();
     unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
     unsigned ArgSize = ObjSize;
-    unsigned Flags = cast<ConstantSDNode>(Op.getOperand(ArgNo+3))->getValue();
-    unsigned AlignFlag = 1 << ISD::ParamFlags::OrigAlignmentOffs;
+    ISD::ParamFlags::ParamFlagsTy Flags = 
+              cast<ConstantSDNode>(Op.getOperand(ArgNo+3))->getValue();
+    unsigned AlignFlag = ISD::ParamFlags::One 
+                                << ISD::ParamFlags::OrigAlignmentOffs;
     unsigned isByVal = Flags & ISD::ParamFlags::ByVal;
     // See if next argument requires stack alignment in ELF
     bool Expand = (ObjectVT == MVT::f64) || ((ArgNo + 1 < e) &&
@@ -1659,8 +1661,9 @@ static SDNode *isBLACompatibleAddress(SDOperand Op, SelectionDAG &DAG) {
 /// does not fit in registers.
 static SDOperand 
 CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain,
-                          unsigned Flags, SelectionDAG &DAG, unsigned Size) {
-  unsigned Align = 1 <<
+                          ISD::ParamFlags::ParamFlagsTy Flags, 
+                          SelectionDAG &DAG, unsigned Size) {
+  unsigned Align = ISD::ParamFlags::One <<
     ((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs);
   SDOperand AlignNode    = DAG.getConstant(Align, MVT::i32);
   SDOperand SizeNode     = DAG.getConstant(Size, MVT::i32);
@@ -1693,7 +1696,8 @@ SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
   
   // Add up all the space actually used.
   for (unsigned i = 0; i != NumOps; ++i) {
-    unsigned Flags = cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
+    ISD::ParamFlags::ParamFlagsTy Flags = 
+          cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
     unsigned ArgSize =MVT::getSizeInBits(Op.getOperand(5+2*i).getValueType())/8;
     if (Flags & ISD::ParamFlags::ByVal)
       ArgSize = (Flags & ISD::ParamFlags::ByValSize) >> 
@@ -1757,8 +1761,10 @@ SDOperand PPCTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG,
   for (unsigned i = 0; i != NumOps; ++i) {
     bool inMem = false;
     SDOperand Arg = Op.getOperand(5+2*i);
-    unsigned Flags = cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
-    unsigned AlignFlag = 1 << ISD::ParamFlags::OrigAlignmentOffs;
+    ISD::ParamFlags::ParamFlagsTy Flags = 
+            cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue();
+    unsigned AlignFlag = ISD::ParamFlags::One << 
+                         ISD::ParamFlags::OrigAlignmentOffs;
     // See if next argument requires stack alignment in ELF
     unsigned next = 5+2*(i+1)+1;
     bool Expand = (Arg.getValueType() == MVT::f64) || ((i + 1 < NumOps) &&
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index a494182..087c981 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1145,8 +1145,9 @@ CopyTailCallClobberedArgumentsToVRegs(SDOperand Chain,
 /// parameter.
 static SDOperand 
 CreateCopyOfByValArgument(SDOperand Src, SDOperand Dst, SDOperand Chain,
-                          unsigned Flags, SelectionDAG &DAG) {
-  unsigned Align = 1 <<
+                          ISD::ParamFlags::ParamFlagsTy Flags, 
+                          SelectionDAG &DAG) {
+  unsigned Align = ISD::ParamFlags::One <<
     ((Flags & ISD::ParamFlags::ByValAlign) >> ISD::ParamFlags::ByValAlignOffs);
   unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >>
     ISD::ParamFlags::ByValSizeOffs;
@@ -1162,7 +1163,8 @@ SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, SelectionDAG &DAG,
                                               unsigned CC,
                                               SDOperand Root, unsigned i) {
   // Create the nodes corresponding to a load from this parameter slot.
-  unsigned Flags = cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue();
+  ISD::ParamFlags::ParamFlagsTy Flags = 
+                cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue();
   bool AlwaysUseMutable = (CC==CallingConv::Fast) && PerformTailCallOpt;
   bool isByVal = Flags & ISD::ParamFlags::ByVal;
   bool isImmutable = !AlwaysUseMutable && !isByVal;
@@ -1380,7 +1382,8 @@ X86TargetLowering::LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG,
   SDOperand PtrOff = DAG.getIntPtrConstant(LocMemOffset);
   PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
   SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo());
-  unsigned Flags    = cast<ConstantSDNode>(FlagsOp)->getValue();
+  ISD::ParamFlags::ParamFlagsTy Flags = 
+            cast<ConstantSDNode>(FlagsOp)->getValue();
   if (Flags & ISD::ParamFlags::ByVal) {
     return CreateCopyOfByValArgument(Arg, PtrOff, Chain, Flags, DAG);
   }
@@ -1642,7 +1645,8 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
         assert(VA.isMemLoc());
         SDOperand Arg = Op.getOperand(5+2*VA.getValNo());
         SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo());
-        unsigned Flags    = cast<ConstantSDNode>(FlagsOp)->getValue();
+        ISD::ParamFlags::ParamFlagsTy Flags = 
+                  cast<ConstantSDNode>(FlagsOp)->getValue();
         // Create frame index.
         int32_t Offset = VA.getLocMemOffset()+FPDiff;
         uint32_t OpSize = (MVT::getSizeInBits(VA.getLocVT())+7)/8;