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| author | Chris Lattner <sabre@nondot.org> | 2007-11-04 06:51:12 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-11-04 06:51:12 +0000 |
| commit | 35032598c4c503540cd49112e7bd6e0687167791 (patch) | |
| tree | c418d20fd06596263dc4ed987fe57dbde75d718f /lib | |
| parent | 5fafff889768f9167c6535900f9bcd0568c73e66 (diff) | |
| download | external_llvm-35032598c4c503540cd49112e7bd6e0687167791.zip external_llvm-35032598c4c503540cd49112e7bd6e0687167791.tar.gz external_llvm-35032598c4c503540cd49112e7bd6e0687167791.tar.bz2 | |
Fix PR1763 by allowing the 'q' constraint to work with 64-bit
regs on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43669 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index dc9cf99..58004f0 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5708,7 +5708,9 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, return make_vector<unsigned>(X86::AX, X86::DX, X86::CX, X86::BX, 0); else if (VT == MVT::i8) return make_vector<unsigned>(X86::AL, X86::DL, X86::CL, X86::BL, 0); - break; + else if (VT == MVT::i64) + return make_vector<unsigned>(X86::RAX, X86::RDX, X86::RCX, X86::RBX, 0); + break; } } |