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authorDuncan Sands <baldrick@free.fr>2010-12-01 12:58:13 +0000
committerDuncan Sands <baldrick@free.fr>2010-12-01 12:58:13 +0000
commit38169788fa26464353f0010f66f8b933c3d8c4bc (patch)
tree7ae64e0589e2f1fd7f298c421ff7ff770d506610 /lib
parent3608d2ac67f22485f8cb23420b98392ae7685d6d (diff)
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I don't think it makes any sense to assert that the target supports SSE3 here.
The user (i.e. whoever generated a call to the intrinsic in the first place) is essentially asking for a particular instruction to be placed in the assembler. If that instruction won't execute on the target machine, that's their problem not ours. Two buildbots with processors that don't support SSE3 were barfing on the apm.ll test in CodeGen/X86 because of this assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120574 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 2bff139..07bd5cf 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -9459,8 +9459,6 @@ X86TargetLowering::EmitPCMP(MachineInstr *MI, MachineBasicBlock *BB,
MachineBasicBlock *
X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const {
- assert(Subtarget->hasSSE3() && "Target must have SSE3 features enabled");
-
DebugLoc dl = MI->getDebugLoc();
const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
@@ -9486,8 +9484,6 @@ X86TargetLowering::EmitMonitor(MachineInstr *MI, MachineBasicBlock *BB) const {
MachineBasicBlock *
X86TargetLowering::EmitMwait(MachineInstr *MI, MachineBasicBlock *BB) const {
- assert(Subtarget->hasSSE3() && "Target must have SSE3 features enabled");
-
DebugLoc dl = MI->getDebugLoc();
const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();