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authorCraig Topper <craig.topper@gmail.com>2013-08-20 05:22:42 +0000
committerCraig Topper <craig.topper@gmail.com>2013-08-20 05:22:42 +0000
commit3b7722cf3a751fc332cfce4dc8d63ecd83deb127 (patch)
tree21f882d81916aaf05282097636ec6b0a2bf61c4e /lib
parentb5e1d5b46fb9b8fdf3924f92f2c5ea978bc2be01 (diff)
downloadexternal_llvm-3b7722cf3a751fc332cfce4dc8d63ecd83deb127.zip
external_llvm-3b7722cf3a751fc332cfce4dc8d63ecd83deb127.tar.gz
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Add AVX-512 and related features to the CPUID detection code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188745 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/X86/X86Subtarget.cpp22
1 files changed, 19 insertions, 3 deletions
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index fae90f2..fb9b55b 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -351,14 +351,30 @@ void X86Subtarget::AutoDetectSubtargetFeatures() {
HasRTM = true;
ToggleFeature(X86::FeatureRTM);
}
- if (IsIntel && ((EBX >> 19) & 0x1)) {
- HasADX = true;
- ToggleFeature(X86::FeatureADX);
+ if (IsIntel && ((EBX >> 16) & 0x1)) {
+ X86SSELevel = AVX512;
+ ToggleFeature(X86::FeatureAVX512);
}
if (IsIntel && ((EBX >> 18) & 0x1)) {
HasRDSEED = true;
ToggleFeature(X86::FeatureRDSEED);
}
+ if (IsIntel && ((EBX >> 19) & 0x1)) {
+ HasADX = true;
+ ToggleFeature(X86::FeatureADX);
+ }
+ if (IsIntel && ((EBX >> 26) & 0x1)) {
+ HasPFI = true;
+ ToggleFeature(X86::FeaturePFI);
+ }
+ if (IsIntel && ((EBX >> 27) & 0x1)) {
+ HasERI = true;
+ ToggleFeature(X86::FeatureERI);
+ }
+ if (IsIntel && ((EBX >> 28) & 0x1)) {
+ HasCDI = true;
+ ToggleFeature(X86::FeatureCDI);
+ }
}
}
}