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| author | Hal Finkel <hfinkel@anl.gov> | 2013-06-07 22:16:19 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-06-07 22:16:19 +0000 |
| commit | 40be73bed71a69853720a7f0609cb1f2f77dc3bd (patch) | |
| tree | 30e8912fe7aea4c1669fb807081042e35c09465b /lib | |
| parent | 95f24fbe4c0609ab30bbdb98c6d5c2155b35a584 (diff) | |
| download | external_llvm-40be73bed71a69853720a7f0609cb1f2f77dc3bd.zip external_llvm-40be73bed71a69853720a7f0609cb1f2f77dc3bd.tar.gz external_llvm-40be73bed71a69853720a7f0609cb1f2f77dc3bd.tar.bz2 | |
Disallow i64 div/rem in PPC32 counter loops
On PPC32, [su]div,rem on i64 types are transformed into runtime library
function calls. As a result, they are not allowed in counter-based loops (the
counter-loops verification pass caught this error; this change fixes PR16169).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183581 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PPCCTRLoops.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCCTRLoops.cpp b/lib/Target/PowerPC/PPCCTRLoops.cpp index d2dd848..08247c2 100644 --- a/lib/Target/PowerPC/PPCCTRLoops.cpp +++ b/lib/Target/PowerPC/PPCCTRLoops.cpp @@ -338,6 +338,13 @@ bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) { CI->getDestTy()->getScalarType()->isIntegerTy(64)) )) return true; + } else if (TT.isArch32Bit() && + J->getType()->getScalarType()->isIntegerTy(64) && + (J->getOpcode() == Instruction::UDiv || + J->getOpcode() == Instruction::SDiv || + J->getOpcode() == Instruction::URem || + J->getOpcode() == Instruction::SRem)) { + return true; } else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) { // On PowerPC, indirect jumps use the counter register. return true; |