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| author | Chris Lattner <sabre@nondot.org> | 2010-11-02 23:57:05 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-11-02 23:57:05 +0000 |
| commit | 491561dcac6f7d6923ea09afc95f18cb2d42cd01 (patch) | |
| tree | 38c4e1e7dfec24581ff6dcbcb22a87e0a84d3719 /lib | |
| parent | f4b284f99141a1f6da0cb2096b0c948b203487e7 (diff) | |
| download | external_llvm-491561dcac6f7d6923ea09afc95f18cb2d42cd01.zip external_llvm-491561dcac6f7d6923ea09afc95f18cb2d42cd01.tar.gz external_llvm-491561dcac6f7d6923ea09afc95f18cb2d42cd01.tar.bz2 | |
per a suggestion by Frits van Bommel, mark all MBlaze Pseudo
instructions as isCodeGenOnly in the parent class instead of
sprinkling it throughout the .td files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118125 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/MBlaze/MBlazeInstrFPU.td | 2 | ||||
| -rw-r--r-- | lib/Target/MBlaze/MBlazeInstrFormats.td | 7 | ||||
| -rw-r--r-- | lib/Target/MBlaze/MBlazeInstrInfo.td | 4 |
3 files changed, 8 insertions, 5 deletions
diff --git a/lib/Target/MBlaze/MBlazeInstrFPU.td b/lib/Target/MBlaze/MBlazeInstrFPU.td index d264a09..a26011d 100644 --- a/lib/Target/MBlaze/MBlazeInstrFPU.td +++ b/lib/Target/MBlaze/MBlazeInstrFPU.td @@ -124,7 +124,7 @@ let isAsCheapAsAMove = 1 in { } -let usesCustomInserter = 1, isCodeGenOnly = 1 in { +let usesCustomInserter = 1 in { def Select_FCC : MBlazePseudo<(outs GPR:$dst), (ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC), "; SELECT_FCC PSEUDO!", diff --git a/lib/Target/MBlaze/MBlazeInstrFormats.td b/lib/Target/MBlaze/MBlazeInstrFormats.td index 71e3b12..8cd330b 100644 --- a/lib/Target/MBlaze/MBlazeInstrFormats.td +++ b/lib/Target/MBlaze/MBlazeInstrFormats.td @@ -49,8 +49,7 @@ def FC : Format<18>; // NOP // Generic MBlaze Format class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr, - list<dag> pattern, InstrItinClass itin> : Instruction -{ + list<dag> pattern, InstrItinClass itin> : Instruction { let Namespace = "MBlaze"; field bits<32> Inst; @@ -61,6 +60,10 @@ class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr, // Top 6 bits are the 'opcode' field let Inst{0-5} = opcode; + // If the instruction is marked as a pseudo, set isCodeGenOnly so that the + // assembler and disassmbler ignore it. + let isCodeGenOnly = !eq(!cast<string>(form), "FPseudo"); + dag OutOperandList = outs; dag InOperandList = ins; diff --git a/lib/Target/MBlaze/MBlazeInstrInfo.td b/lib/Target/MBlaze/MBlazeInstrInfo.td index d7bb4a3..c57c1ce 100644 --- a/lib/Target/MBlaze/MBlazeInstrInfo.td +++ b/lib/Target/MBlaze/MBlazeInstrInfo.td @@ -125,7 +125,7 @@ def xaddr : ComplexPattern<i32, 2, "SelectAddrRegReg", [], []>; //===----------------------------------------------------------------------===// // As stack alignment is always done with addiu, we need a 16-bit immediate -let Defs = [R1], Uses = [R1], isCodeGenOnly = 1 in { +let Defs = [R1], Uses = [R1] in { def ADJCALLSTACKDOWN : MBlazePseudo<(outs), (ins simm16:$amt), "#ADJCALLSTACKDOWN $amt", [(callseq_start timm:$amt)]>; @@ -526,7 +526,7 @@ let neverHasSideEffects = 1 in { def NOP : MBlazeInst< 0x20, FC, (outs), (ins), "nop ", [], IIAlu>; } -let usesCustomInserter = 1, isCodeGenOnly = 1 in { +let usesCustomInserter = 1 in { def Select_CC : MBlazePseudo<(outs GPR:$dst), (ins GPR:$T, GPR:$F, GPR:$CMP, i32imm:$CC), "; SELECT_CC PSEUDO!", |