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authorNate Begeman <natebegeman@mac.com>2005-10-21 01:51:45 +0000
committerNate Begeman <natebegeman@mac.com>2005-10-21 01:51:45 +0000
commit4d3856768934ee748f754cc134ba88180ce42d1c (patch)
treef05a602628051cf4724ad66a7f008ff230df9222 /lib
parentfe9234db9b030182ec95c2912a549450e43918b9 (diff)
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Fix a typo in the dag combiner, so that this can work on i64 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23856 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 6c1d22c..b523bce 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2607,9 +2607,8 @@ SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
}
// Extract the sign bit and add it to the quotient
SDOperand T =
- DAG.getNode(ISD::SRL, MVT::i32, Q,
- DAG.getConstant(MVT::getSizeInBits(VT)-1,
- TLI.getShiftAmountTy()));
+ DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(MVT::getSizeInBits(VT)-1,
+ TLI.getShiftAmountTy()));
WorkList.push_back(T.Val);
return DAG.getNode(ISD::ADD, VT, Q, T);
}