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author | Chad Rosier <mcrosier@apple.com> | 2011-11-16 18:39:44 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2011-11-16 18:39:44 +0000 |
commit | 508a1f4db16baea5c0d5b1c4797d005dff1ee30f (patch) | |
tree | 0339bf644917249f2fbf848a0975c33f1a30e721 /lib | |
parent | 14117c44770c32b56de143a0eff8c2d0fd694e0d (diff) | |
download | external_llvm-508a1f4db16baea5c0d5b1c4797d005dff1ee30f.zip external_llvm-508a1f4db16baea5c0d5b1c4797d005dff1ee30f.tar.gz external_llvm-508a1f4db16baea5c0d5b1c4797d005dff1ee30f.tar.bz2 |
Check to make sure we can select the instruction before trying to put the
operands into a register. Otherwise, we may materialize dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144805 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 96e2b70..de13a29 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -1670,12 +1670,6 @@ bool ARMFastISel::SelectBinaryOp(const Instruction *I, unsigned ISDOpcode) { if (isFloat && !Subtarget->hasVFP2()) return false; - unsigned Op1 = getRegForValue(I->getOperand(0)); - if (Op1 == 0) return false; - - unsigned Op2 = getRegForValue(I->getOperand(1)); - if (Op2 == 0) return false; - unsigned Opc; bool is64bit = VT == MVT::f64 || VT == MVT::i64; switch (ISDOpcode) { @@ -1690,6 +1684,12 @@ bool ARMFastISel::SelectBinaryOp(const Instruction *I, unsigned ISDOpcode) { Opc = is64bit ? ARM::VMULD : ARM::VMULS; break; } + unsigned Op1 = getRegForValue(I->getOperand(0)); + if (Op1 == 0) return false; + + unsigned Op2 = getRegForValue(I->getOperand(1)); + if (Op2 == 0) return false; + unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT)); AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg) |