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| author | Jim Grosbach <grosbach@apple.com> | 2010-12-01 21:09:40 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-12-01 21:09:40 +0000 |
| commit | 5177f79c378b47e38bed5ac05ba4b597f31b864e (patch) | |
| tree | dbd1e7078fcaae830ef78c22b96a27d336b9481c /lib | |
| parent | 9f44724be058d17944dcd9ef6a6b57734b3744b8 (diff) | |
| download | external_llvm-5177f79c378b47e38bed5ac05ba4b597f31b864e.zip external_llvm-5177f79c378b47e38bed5ac05ba4b597f31b864e.tar.gz external_llvm-5177f79c378b47e38bed5ac05ba4b597f31b864e.tar.bz2 | |
Use the correct fixup type for ARM VLDR*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120604 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index d35a1c6..7a7864f 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -658,7 +658,7 @@ getAddrModeS1OpValue(const MCInst &MI, unsigned OpIdx, return getAddrModeSOpValue(MI, OpIdx, 1); } -/// getAddrMode5OpValue - Return encoding info for 'reg +/- imm12' operand. +/// getAddrMode5OpValue - Return encoding info for 'reg +/- imm10' operand. uint32_t ARMMCCodeEmitter:: getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const { @@ -676,7 +676,7 @@ getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx, assert(MO.isExpr() && "Unexpected machine operand type!"); const MCExpr *Expr = MO.getExpr(); - MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_12); + MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_10); Fixups.push_back(MCFixup::Create(0, Expr, Kind)); ++MCNumCPRelocations; |