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| author | Bill Wendling <isanbard@gmail.com> | 2011-10-18 22:11:18 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-10-18 22:11:18 +0000 |
| commit | 564392bd3f6df4ba139d3be34017ed2a826f78bb (patch) | |
| tree | df0127a4b5df6c3145f756d987c495dcba0bd08e /lib | |
| parent | b9fecf4e077cfd54884ce96ef6bd9febf0d84191 (diff) | |
| download | external_llvm-564392bd3f6df4ba139d3be34017ed2a826f78bb.zip external_llvm-564392bd3f6df4ba139d3be34017ed2a826f78bb.tar.gz external_llvm-564392bd3f6df4ba139d3be34017ed2a826f78bb.tar.bz2 | |
The value we're comparing against may be too large for the ARM CMP
instruction. Move the value into a register and then use that for the CMP.
<rdar://problem/10305266>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142431 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index a524ddc..18aa3b4 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -5849,38 +5849,42 @@ EmitSjLjDispatchBlock(MachineInstr *MI, MachineBasicBlock *MBB) const { .addFrameIndex(FI) .addImm(4) .addMemOperand(FIMMOLd)); - AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPri)) - .addReg(NewVReg1) + + unsigned NewVReg2 = MRI->createVirtualRegister(TRC); + AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), NewVReg2) .addImm(LPadList.size())); + AddDefaultPred(BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) + .addReg(NewVReg1) + .addReg(NewVReg2)); BuildMI(DispatchBB, dl, TII->get(ARM::Bcc)) .addMBB(TrapBB) .addImm(ARMCC::HI) .addReg(ARM::CPSR); - unsigned NewVReg2 = MRI->createVirtualRegister(TRC); + unsigned NewVReg3 = MRI->createVirtualRegister(TRC); AddDefaultCC( - AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg2) + AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg3) .addReg(NewVReg1) .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); - unsigned NewVReg3 = MRI->createVirtualRegister(TRC); - AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg3) + unsigned NewVReg4 = MRI->createVirtualRegister(TRC); + AddDefaultPred(BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg4) .addJumpTableIndex(MJTI) .addImm(UId)); MachineMemOperand *JTMMOLd = MF->getMachineMemOperand(MachinePointerInfo::getJumpTable(), MachineMemOperand::MOLoad, 4, 4); - unsigned NewVReg4 = MRI->createVirtualRegister(TRC); + unsigned NewVReg5 = MRI->createVirtualRegister(TRC); AddDefaultPred( - BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg4) - .addReg(NewVReg2, RegState::Kill) - .addReg(NewVReg3) + BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) + .addReg(NewVReg3, RegState::Kill) + .addReg(NewVReg4) .addImm(0) .addMemOperand(JTMMOLd)); BuildMI(DispContBB, dl, TII->get(ARM::BR_JTadd)) - .addReg(NewVReg4, RegState::Kill) - .addReg(NewVReg3) + .addReg(NewVReg5, RegState::Kill) + .addReg(NewVReg4) .addJumpTableIndex(MJTI) .addImm(UId); } |