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author | Rafael Espindola <rafael.espindola@gmail.com> | 2007-08-10 14:44:42 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2007-08-10 14:44:42 +0000 |
commit | 594d37e21aea4ef841d9ee5d9c328c4bf1c6bed7 (patch) | |
tree | 5f2d522f84dd3b83747f6182b98ba0fa17795c04 /lib | |
parent | ae9671b838150c780c13e601574efa6641788f2b (diff) | |
download | external_llvm-594d37e21aea4ef841d9ee5d9c328c4bf1c6bed7.zip external_llvm-594d37e21aea4ef841d9ee5d9c328c4bf1c6bed7.tar.gz external_llvm-594d37e21aea4ef841d9ee5d9c328c4bf1c6bed7.tar.bz2 |
propagate struct size and alignment of byval arguments to the DAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40986 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/SelectionDAG/CallingConvLower.cpp | 12 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 9 | ||||
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 7 |
3 files changed, 25 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp index defbe34..bcd132f 100644 --- a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp +++ b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp @@ -28,6 +28,17 @@ CCState::CCState(unsigned CC, bool isVarArg, const TargetMachine &tm, UsedRegs.resize(MRI.getNumRegs()); } +void CCState::HandleStruct(unsigned ValNo, MVT::ValueType ValVT, + MVT::ValueType LocVT, CCValAssign::LocInfo LocInfo, + unsigned ArgFlags) { + unsigned Align = 1 << ((ArgFlags & ISD::ParamFlags::ByValAlign) >> + ISD::ParamFlags::ByValAlignOffs); + unsigned Size = (ArgFlags & ISD::ParamFlags::ByValSize) >> + ISD::ParamFlags::ByValSizeOffs; + unsigned Offset = AllocateStack(Size, Align); + + addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); +} /// MarkAllocated - Mark a register and all of its aliases as allocated. void CCState::MarkAllocated(unsigned Reg) { @@ -99,4 +110,3 @@ void CCState::AnalyzeCallResult(SDNode *TheCall, CCAssignFn Fn) { } } } - diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index afb681f..df40972 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -3836,8 +3836,15 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { Flags |= ISD::ParamFlags::InReg; if (Attrs && Attrs->paramHasAttr(j, ParamAttr::StructRet)) Flags |= ISD::ParamFlags::StructReturn; - if (Attrs && Attrs->paramHasAttr(j, ParamAttr::ByVal)) + if (Attrs && Attrs->paramHasAttr(j, ParamAttr::ByVal)) { Flags |= ISD::ParamFlags::ByVal; + const PointerType *Ty = cast<PointerType>(I->getType()); + const StructType *STy = cast<StructType>(Ty->getElementType()); + unsigned StructAlign = Log2_32(getTargetData()->getABITypeAlignment(STy)); + unsigned StructSize = getTargetData()->getTypeSize(STy); + Flags |= (StructAlign << ISD::ParamFlags::ByValAlignOffs); + Flags |= (StructSize << ISD::ParamFlags::ByValSizeOffs); + } if (Attrs && Attrs->paramHasAttr(j, ParamAttr::Nest)) Flags |= ISD::ParamFlags::Nest; Flags |= (OriginalAlignment << ISD::ParamFlags::OrigAlignmentOffs); diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 3af3934..184e355 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1260,7 +1260,12 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) { int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8, VA.getLocMemOffset()); SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); - ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0)); + + unsigned Flags = cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue(); + if (Flags & ISD::ParamFlags::ByVal) + ArgValues.push_back(FIN); + else + ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0)); } } |