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author | Evan Cheng <evan.cheng@apple.com> | 2008-02-22 09:25:47 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-02-22 09:25:47 +0000 |
commit | 60490e62df52fd0dc5aecb61e4fceb6cc064c5e1 (patch) | |
tree | b602d82da3a72ee7192832e235f99e06c5b5137e /lib | |
parent | a37ecfeea3b595916a7380dbf1184b9ad9b1d5f4 (diff) | |
download | external_llvm-60490e62df52fd0dc5aecb61e4fceb6cc064c5e1.zip external_llvm-60490e62df52fd0dc5aecb61e4fceb6cc064c5e1.tar.gz external_llvm-60490e62df52fd0dc5aecb61e4fceb6cc064c5e1.tar.bz2 |
Allow re-materialization of pic load (controlled by -remat-pic-load for now).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47476 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index cfbce7e..082b896 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -37,6 +37,10 @@ namespace { cl::desc("Print instructions that the allocator wants to" " fuse, but the X86 backend currently can't"), cl::Hidden); + cl::opt<bool> + ReMatPICLoad("remat-pic-load", + cl::desc("Allow rematerializing pic load"), + cl::init(false), cl::Hidden); } X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) @@ -735,10 +739,26 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const { // Loads from constant pools are trivially rematerializable. if (MI->getOperand(1).isReg() && MI->getOperand(2).isImm() && MI->getOperand(3).isReg() && MI->getOperand(4).isCPI() && - MI->getOperand(1).getReg() == 0 && MI->getOperand(2).getImm() == 1 && - MI->getOperand(3).getReg() == 0) - return true; + MI->getOperand(3).getReg() == 0) { + unsigned BaseReg = MI->getOperand(1).getReg(); + if (BaseReg == 0) + return true; + if (!ReMatPICLoad) + return false; + // Allow re-materialization of PIC load. + MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo(); + bool isPICBase = false; + for (MachineRegisterInfo::def_iterator I = MRI.def_begin(BaseReg), + E = MRI.def_end(); I != E; ++I) { + MachineInstr *DefMI = I.getOperand().getParent(); + if (DefMI->getOpcode() != X86::MOVPC32r) + return false; + assert(!isPICBase && "More than one PIC base?"); + isPICBase = true; + } + return isPICBase; + } // If this is a load from a fixed argument slot, we know the value is // invariant across the whole function, because we don't redefine argument |