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author | Evan Cheng <evan.cheng@apple.com> | 2007-02-15 05:59:24 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-02-15 05:59:24 +0000 |
commit | 61de82d8853a02fe39c47302432abb70a586704f (patch) | |
tree | 87756c0f1a5d6d7be522071cbb055acae26278dd /lib | |
parent | ad1d5c3bc55249b3291338288c90773ce80df11a (diff) | |
download | external_llvm-61de82d8853a02fe39c47302432abb70a586704f.zip external_llvm-61de82d8853a02fe39c47302432abb70a586704f.tar.gz external_llvm-61de82d8853a02fe39c47302432abb70a586704f.tar.bz2 |
Use BitVector instead of vector<bool> which can be extremely slow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34302 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocLocal.cpp | 2 | ||||
-rw-r--r-- | lib/Target/MRegisterInfo.cpp | 6 |
3 files changed, 5 insertions, 5 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 83852ca..57a73d2 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -461,7 +461,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb, // If the kill happens after the definition, we have an intra-block // live range. if (killIdx > defIndex) { - assert(vi.AliveBlocks.empty() && + assert(vi.AliveBlocks.none() && "Shouldn't be alive across any blocks!"); LiveRange LR(defIndex, killIdx, ValNum); interval.addRange(LR); diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index 74d76c1..f862023 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -789,7 +789,7 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) { // is allocatable. To handle this, we mark all unallocatable registers as // being pinned down, permanently. { - std::vector<bool> Allocable = RegInfo->getAllocatableSet(Fn); + BitVector Allocable = RegInfo->getAllocatableSet(Fn); for (unsigned i = 0, e = Allocable.size(); i != e; ++i) if (!Allocable[i]) PhysRegsUsed[i] = -2; // Mark the reg unallocable. diff --git a/lib/Target/MRegisterInfo.cpp b/lib/Target/MRegisterInfo.cpp index 01295e8..7caaae9 100644 --- a/lib/Target/MRegisterInfo.cpp +++ b/lib/Target/MRegisterInfo.cpp @@ -14,10 +14,10 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/MRegisterInfo.h" #include "llvm/Target/TargetFrameInfo.h" - #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineLocation.h" +#include "llvm/ADT/BitVector.h" using namespace llvm; @@ -34,8 +34,8 @@ MRegisterInfo::MRegisterInfo(const TargetRegisterDesc *D, unsigned NR, MRegisterInfo::~MRegisterInfo() {} -std::vector<bool> MRegisterInfo::getAllocatableSet(MachineFunction &MF) const { - std::vector<bool> Allocatable(NumRegs); +BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF) const { + BitVector Allocatable(NumRegs); for (MRegisterInfo::regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) { const TargetRegisterClass *RC = *I; |