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| author | Jim Grosbach <grosbach@apple.com> | 2012-10-15 21:23:40 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-10-15 21:23:40 +0000 |
| commit | 64ba6352097d38db5a57f4bf62dcdf14b0e6e147 (patch) | |
| tree | e6b5ecc5adef4fe3ed9ac70294de813f97bba26a /lib | |
| parent | 66d4b0fbf46d999f87f5c9a5a67751c111727b50 (diff) | |
| download | external_llvm-64ba6352097d38db5a57f4bf62dcdf14b0e6e147.zip external_llvm-64ba6352097d38db5a57f4bf62dcdf14b0e6e147.tar.gz external_llvm-64ba6352097d38db5a57f4bf62dcdf14b0e6e147.tar.bz2 | |
ARM: v1i64 and v2i64 VBSL intrinsic support.
rdar://12502028
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165981 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 837c37d..ede4def 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -4504,12 +4504,21 @@ def : Pat<(v2f32 (int_arm_neon_vbsl (v2f32 DPR:$src1), (v2f32 DPR:$Vn), (v2f32 DPR:$Vm))), (VBSLd DPR:$src1, DPR:$Vn, DPR:$Vm)>, Requires<[HasNEON]>; +def : Pat<(v1i64 (int_arm_neon_vbsl (v1i64 DPR:$src1), + (v1i64 DPR:$Vn), (v1i64 DPR:$Vm))), + (VBSLd DPR:$src1, DPR:$Vn, DPR:$Vm)>, + Requires<[HasNEON]>; def : Pat<(v2i32 (or (and DPR:$Vn, DPR:$Vd), (and DPR:$Vm, (vnotd DPR:$Vd)))), (VBSLd DPR:$Vd, DPR:$Vn, DPR:$Vm)>, Requires<[HasNEON]>; +def : Pat<(v1i64 (or (and DPR:$Vn, DPR:$Vd), + (and DPR:$Vm, (vnotd DPR:$Vd)))), + (VBSLd DPR:$Vd, DPR:$Vn, DPR:$Vm)>, + Requires<[HasNEON]>; + def VBSLq : N3VX<1, 0, 0b01, 0b0001, 1, 1, (outs QPR:$Vd), (ins QPR:$src1, QPR:$Vn, QPR:$Vm), N3RegFrm, IIC_VCNTiQ, @@ -4533,11 +4542,19 @@ def : Pat<(v4f32 (int_arm_neon_vbsl (v4f32 QPR:$src1), (v4f32 QPR:$Vn), (v4f32 QPR:$Vm))), (VBSLq QPR:$src1, QPR:$Vn, QPR:$Vm)>, Requires<[HasNEON]>; +def : Pat<(v2i64 (int_arm_neon_vbsl (v2i64 QPR:$src1), + (v2i64 QPR:$Vn), (v2i64 QPR:$Vm))), + (VBSLq QPR:$src1, QPR:$Vn, QPR:$Vm)>, + Requires<[HasNEON]>; def : Pat<(v4i32 (or (and QPR:$Vn, QPR:$Vd), (and QPR:$Vm, (vnotq QPR:$Vd)))), (VBSLq QPR:$Vd, QPR:$Vn, QPR:$Vm)>, Requires<[HasNEON]>; +def : Pat<(v2i64 (or (and QPR:$Vn, QPR:$Vd), + (and QPR:$Vm, (vnotq QPR:$Vd)))), + (VBSLq QPR:$Vd, QPR:$Vn, QPR:$Vm)>, + Requires<[HasNEON]>; // VBIF : Vector Bitwise Insert if False // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst", |