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authorTim Northover <Tim.Northover@arm.com>2013-05-04 20:14:04 +0000
committerTim Northover <Tim.Northover@arm.com>2013-05-04 20:14:04 +0000
commit654c2d6b7a9274fc281c30c0e91419aadb6dc78a (patch)
tree01128f4473ca575a41e1eb3ff38f3a0cee0c4f59 /lib
parent85829bb98a998cff8f364c12d172da948ca225f4 (diff)
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AArch64: implement relocations for global access
The large memory model (default and main viable for JIT) emits addresses in need of relocation as movz x0, #:abs_g3:somewhere movk x0, #:abs_g2_nc:somewhere movk x0, #:abs_g1_nc:somewhere movk x0, #:abs_g0_nc:somewhere To support this we must implement those four relocations in the dynamic loader. This allows (for example) the test-global.ll MCJIT test to pass on AArch64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181132 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp31
1 files changed, 31 insertions, 0 deletions
diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
index 49baf75..5e361ef 100644
--- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
+++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
@@ -296,6 +296,37 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
*TargetPtr = static_cast<uint32_t>(Result & 0xffffffffU);
break;
}
+ case ELF::R_AARCH64_MOVW_UABS_G3: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= Result >> (48 - 5);
+ // Shift is "lsl #48", in bits 22:21
+ *TargetPtr |= 3 << 21;
+ break;
+ }
+ case ELF::R_AARCH64_MOVW_UABS_G2_NC: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= ((Result & 0xffff00000000ULL) >> (32 - 5));
+ // Shift is "lsl #32", in bits 22:21
+ *TargetPtr |= 2 << 21;
+ break;
+ }
+ case ELF::R_AARCH64_MOVW_UABS_G1_NC: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= ((Result & 0xffff0000U) >> (16 - 5));
+ // Shift is "lsl #16", in bits 22:21
+ *TargetPtr |= 1 << 21;
+ break;
+ }
+ case ELF::R_AARCH64_MOVW_UABS_G0_NC: {
+ uint64_t Result = Value + Addend;
+ // Immediate goes in bits 20:5 of MOVZ/MOVK instruction
+ *TargetPtr |= ((Result & 0xffffU) << 5);
+ // Shift is "lsl #0", in bits 22:21. No action needed.
+ break;
+ }
}
}