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author | Dan Gohman <gohman@apple.com> | 2008-09-10 21:02:08 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2008-09-10 21:02:08 +0000 |
commit | 658637e7af8ceab8d7af41261690824de0145069 (patch) | |
tree | bc8033360ae3fcc9da91c094d9d0e6485b8de163 /lib | |
parent | 109994919cad0392c790f65b0f6af9030e3a4244 (diff) | |
download | external_llvm-658637e7af8ceab8d7af41261690824de0145069.zip external_llvm-658637e7af8ceab8d7af41261690824de0145069.tar.gz external_llvm-658637e7af8ceab8d7af41261690824de0145069.tar.bz2 |
X86FastISel support for double->float and float->double casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56070 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 343732e..9487511 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -92,6 +92,9 @@ private: bool X86SelectTrunc(Instruction *I); + bool X86SelectFPExt(Instruction *I); + bool X86SelectFPTrunc(Instruction *I); + bool X86SelectCall(Instruction *I); CCAssignFn *CCAssignFnForCall(unsigned CC, bool isTailCall = false); @@ -656,6 +659,42 @@ bool X86FastISel::X86SelectSelect(Instruction *I) { return true; } +bool X86FastISel::X86SelectFPExt(Instruction *I) { + if (Subtarget->hasSSE2()) { + if (I->getType() == Type::DoubleTy) { + Value *V = I->getOperand(0); + if (V->getType() == Type::FloatTy) { + unsigned OpReg = getRegForValue(V); + if (OpReg == 0) return false; + unsigned ResultReg = createResultReg(X86::FR64RegisterClass); + BuildMI(MBB, TII.get(X86::CVTSS2SDrr), ResultReg).addReg(OpReg); + UpdateValueMap(I, ResultReg); + return true; + } + } + } + + return false; +} + +bool X86FastISel::X86SelectFPTrunc(Instruction *I) { + if (Subtarget->hasSSE2()) { + if (I->getType() == Type::FloatTy) { + Value *V = I->getOperand(0); + if (V->getType() == Type::DoubleTy) { + unsigned OpReg = getRegForValue(V); + if (OpReg == 0) return false; + unsigned ResultReg = createResultReg(X86::FR32RegisterClass); + BuildMI(MBB, TII.get(X86::CVTSD2SSrr), ResultReg).addReg(OpReg); + UpdateValueMap(I, ResultReg); + return true; + } + } + } + + return false; +} + bool X86FastISel::X86SelectTrunc(Instruction *I) { if (Subtarget->is64Bit()) // All other cases should be handled by the tblgen generated code. @@ -937,6 +976,10 @@ X86FastISel::TargetSelectInstruction(Instruction *I) { return X86SelectSelect(I); case Instruction::Trunc: return X86SelectTrunc(I); + case Instruction::FPExt: + return X86SelectFPExt(I); + case Instruction::FPTrunc: + return X86SelectFPTrunc(I); } return false; |